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srchi
2012 May 14
0
[LLVMdev] Register coalescing (Subregs and SuperRegs)
...-------
// Combine.
let isPredicable = 1, neverHasSideEffects = 1 in
def COMBINE_rr : ALU32_rr<(outs DoubleRegs:$dst),
(ins IntRegs:$src1, IntRegs:$src2),
"$dst = combine($src1, $src2)",
[]>;
def: Pat<(i64 (or (i64 (shl (i64 DoubleRegs:$srcHigh),
(i32 32))),
(i64 DoubleRegs:$srcLow))),
(i64 (COMBINE_rr (EXTRACT_SUBREG (i64 DoubleRegs:$srcHigh),
subreg_loreg),
(EXTRACT_SUBREG (i64
DoubleRegs:$srcLow),...