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I was investigating an error diagnostic in the following test example: typedef signed char char16 __attribute__((ext_vector_type(16))); void test( char16 srcA, char16 srcB, char16 *dst) { *dst = ( srcA == srcB ); } which produces the message: mismatch.c:5:10: error: assigning to 'char16' from incompatible type 'char __attribute__((ext_vector_type(16)))' *dst = ( srcA == srcB ); ^ ~~~~~~~~~~~~~~~~ 1 error generated....

For example, given a multiclass for ADD 32 bit that might produce something like: ADD32_REG_REG_REG (operands are all registers for a 32 bit add) ADD32_REG_IMM_REG (srcA is a register, srcB is an immediate and dst is a register) ADD32_REG_IMM_MEM (srcA is a register, srcB is an immediate and dst is a memory address) What I'd like to do is replace an operand, for example, change srcA from a REG to a MEM in ADD32_REG_REG_REG (so it would be ADD32_MEM_REG_REG)....

...gt;(Imm); }]>; >> >> defm SUB16u_ : ABD_NonCommutative<"sub16u", unsignedSub, LOADRegs, >> GPRRegs, DSTRegs, i16, i16, i16, simm16, immZExt16x>; >> >> multiclass ABD_NonCommutative<string asmstr, SDPatternOperator OpNode, >> RegisterClass srcAReg, RegisterClass srcBReg, >> RegisterClass dstReg, ValueType srcAType, ValueType >> srcBType, ValueType dstType, >> Operand ImmOd, ImmLeaf imm_type> >> { >> .... >> def IMM_MEM_MEM : SetABDIn<asmstr, ImmOd, memh...

...f immZExt16x : ImmLeaf<i16, [{ return isUInt<16>(Imm); }]>; defm SUB16u_ : ABD_NonCommutative<"sub16u", unsignedSub, LOADRegs, GPRRegs, DSTRegs, i16, i16, i16, simm16, immZExt16x>; multiclass ABD_NonCommutative<string asmstr, SDPatternOperator OpNode, RegisterClass srcAReg, RegisterClass srcBReg, RegisterClass dstReg, ValueType srcAType, ValueType srcBType, ValueType dstType, Operand ImmOd, ImmLeaf imm_type> { .... def IMM_MEM_MEM : SetABDIn<asmstr, ImmOd, memhx, memhx, [(directStor...

Hi Martin, On Oct 2, 2013, at 6:25 AM, Martin O'Riordan <Martin.ORiordan at movidius.com> wrote: > I was investigating an error diagnostic in the following test example: > > typedef signed char char16 __attribute__((ext_vector_type(16))); > > void test( char16 srcA, char16 srcB, char16 *dst) { > *dst = ( srcA == srcB ); > } > > which produces the message: > > mismatch.c:5:10: error: assigning to 'char16' from incompatible type > 'char __attribute__((ext_vector_type(16)))' > *dst = ( srcA == srcB ); >...

It appears that it's impossible to duplicate a node in the dag. For example, there is some code: b = a * a; // a is a global int A LD node is generated for A and it goes into both Operand 0 and 1 of the MUL node. The issue is I'm trying to match a pattern of: set dstReg:$dstD (OpNode (srcAType (load addr32:$srcA)), (srcBType (load addr32:$srcB))) so basically a mem, mem, reg operation. The issue is this pattern won't match in the above example because there is only one LD generated for 'a'. I tried to duplicate the LD in the dag but it doesn't show up, it always red...

Hi all, considering following .ll file ; ModuleID = 'vect3x.ll' target triple = "armv7-none-linux-gnueabi" define arm_aapcscc void @test_hi_char8(i8* %.T0351, <8 x i8>* nocapture %srcA, <4 x i8>* nocapture %dst) noinline { L.entry: %0 = tail call arm_aapcscc i32 (...)* @get_global_id(i8* %.T0351, i32 0) %1 = bitcast <8 x i8>* %srcA to <4 x i8>* %2 = getelementptr <4 x i8>* %1, i32 0, i32 4 %3 = bitcast i8* %2 to <4 x i8>* %4 = shl i32 %0,...

I was investigating an error diagnostic in the following test example: typedef signed char char16 __attribute__((ext_vector_type(16))); void test( char16 srcA, char16 srcB, char16 *dst) { *dst = ( srcA == srcB ); } which produces the message: mismatch.c:5:10: error: assigning to 'char16' from incompatible type 'char __attribute__((ext_vector_type(16)))' *dst = ( srcA == srcB ); ^ ~~~~~~~~~~~~~~~~ 1 error generated....

...lt;Matthew.Arsenault at amd.com> wrote: > On 04/12/2017 10:25 AM, Ryan Taylor via llvm-dev wrote: > > For example, given a multiclass for ADD 32 bit that might produce > something like: > > ADD32_REG_REG_REG (operands are all registers for a 32 bit add) > ADD32_REG_IMM_REG (srcA is a register, srcB is an immediate and dst is a > register) > ADD32_REG_IMM_MEM (srcA is a register, srcB is an immediate and dst is a > memory address) > > What I'd like to do is replace an operand, for example, change srcA from a > REG to a MEM in ADD32_REG_REG_REG (so it w...

Thanks for your reply. We are propagating sign info to tablegen currently using BinaryWithFlagsSDNode.Flags.hasNoSignedWrap atm. I imagine (I have not looked) they are printed according to instruction in AsmPrinter.cpp (pure speculation). I'm still confused as to why 0x7FFF is ok to match 16 bit int but not 0x8000? Thanks. On Wed, Feb 15, 2017 at 1:44 PM, Manuel Jacob <me at

...LDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > > considering following .ll file > > ; ModuleID = 'vect3x.ll' > target triple = "armv7-none-linux-gnueabi" > > define arm_aapcscc void @test_hi_char8(i8* %.T0351, <8 x i8>* nocapture %srcA, <4 x i8>* nocapture %dst) noinline { > L.entry: >  %0 = tail call arm_aapcscc  i32 (...)* @get_global_id(i8* %.T0351, i32 0) >  %1 = bitcast <8 x i8>* %srcA to <4 x i8>* >  %2 = getelementptr <4 x i8>* %1, i32 0, i32 4 >  %3 = bitcast i8* %2 to <4 x i8>...

Here is the instruction in question: multiclass AD<string asmstr, SDPatternOperator OpNode, RegisterClass srcAReg, RegisterClass dstReg, ValueType srcAType, ValueType dstType, Operand ImmOd, ImmLeaf imm_type> { def REG_REG : SetADInOut<asmstr, srcAReg, dstReg, [(set dstReg:$dstD, (OpNode srcAReg:$srcA))]>; def IMM_REG : SetADInOut<a...

...25, 2015 at 1:18 PM, Quentin Colombet <qcolombet at apple.com> wrote: > > On Aug 25, 2015, at 10:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > Here is the instruction in question: > > multiclass AD<string asmstr, SDPatternOperator OpNode, RegisterClass > srcAReg, > RegisterClass dstReg, ValueType srcAType, > ValueType dstType, Operand ImmOd, ImmLeaf imm_type> > { > def REG_REG : SetADInOut<asmstr, srcAReg, dstReg, > [(set dstReg:$dstD, (OpNode > srcAReg:$srcA))]>; >...

...<qcolombet at apple.com> > wrote: > >> >> On Aug 25, 2015, at 10:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: >> >> Here is the instruction in question: >> >> multiclass AD<string asmstr, SDPatternOperator OpNode, RegisterClass >> srcAReg, >> RegisterClass dstReg, ValueType srcAType, >> ValueType dstType, Operand ImmOd, ImmLeaf imm_type> >> { >> def REG_REG : SetADInOut<asmstr, srcAReg, dstReg, >> [(set dstReg:$dstD, (OpNode >> sr...

...> wrote: >> >>> >>> On Aug 25, 2015, at 10:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: >>> >>> Here is the instruction in question: >>> >>> multiclass AD<string asmstr, SDPatternOperator OpNode, RegisterClass >>> srcAReg, >>> RegisterClass dstReg, ValueType srcAType, >>> ValueType dstType, Operand ImmOd, ImmLeaf imm_type> >>> { >>> def REG_REG : SetADInOut<asmstr, srcAReg, dstReg, >>> [(set dstReg:$dstD,...

...;>> >>>> On Aug 25, 2015, at 10:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: >>>> >>>> Here is the instruction in question: >>>> >>>> multiclass AD<string asmstr, SDPatternOperator OpNode, RegisterClass >>>> srcAReg, >>>> RegisterClass dstReg, ValueType srcAType, >>>> ValueType dstType, Operand ImmOd, ImmLeaf imm_type> >>>> { >>>> def REG_REG : SetADInOut<asmstr, srcAReg, dstReg, >>>>...

Dear list, I've just installed R-2.2.0 under Solaris and have a question about installing packages. If a package fails to install for any reason and I go to install another package, I get this message: $ R-2.2.0-64bit --vanilla CMD INSTALL ~/srca/cran/RSQLite_0.4-0.tar.gz ERROR: failed to lock directory '/app/openpkg/lib/R-2.2.0-64bit/lib/R/library' for modifying Try removing '/app/openpkg/lib/R-2.2.0-64bit/lib/R/library/00LOCK' I can remove the lock directory by hand, and then the next package installs, but this makes it...

...paste(Data1$Site, Data1$Position) creates the appropriate "SitePos" values e.g. "CR core" but as character values not as a factor. A linear model run on the updated dataframe works but notes that it coerces "SitePos" from character to factor e.g. Model.G = lmer(log10(SrCa) ~ SitePos + (1 | Eel), data = Data1) . The next step of a multiple comparison test on the output of the linear model: Model.G.mct = glht(Model.G, linfct = mcp(SitePos = "Tukey")) fails because the mct does not recognize "SitePos" as a factor and gives error message: "Erro...

...ected contrasts from a linear model while using packages lme4 and multcomp? I am running R 2.13.0 under Windows 7. The following linear model and mct produces a global mct of 15 paired contrasts of the combined (Site, Position) factor SitePos of which only 9 are of interest. Model.G = lmer(log10(SrCa) ~ SitePos + (1 | Eel), data = Data1) Model.G.mct = glht(Model.G, linfct = mcp(SitePos = "Tukey"))summary (Model.G.mct) The following code creates the desired reduced set of contrasts but I have been unable to apply it correctly to the mct. contr = rbind("CR core - MH core" =...

...LDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > > considering following .ll file > > ; ModuleID = 'vect3x.ll' > target triple = "armv7-none-linux-gnueabi" > > define arm_aapcscc void @test_hi_char8(i8* %.T0351, <8 x i8>* nocapture %srcA, <4 x i8>* nocapture %dst) noinline { > L.entry: > %0 = tail call arm_aapcscc i32 (...)* @get_global_id(i8* %.T0351, i32 0) > %1 = bitcast <8 x i8>* %srcA to <4 x i8>* > %2 = getelementptr <4 x i8>* %1, i32 0, i32 4 > %3 = bitcast i8* %2 to <4 x i8>...