Displaying 5 results from an estimated 5 matches for "src_index".
2017 Sep 16
2
assertion triggered since update to llvm 5
...ain (argc=4, argv=0x7fffffffca18)
at /home/andy/dev/zig/src/main.cpp:666
Here's the smallest zig test case to cause the problem:
export fn entry() {
var bytes: []const u8 = "format";
write(bytes);
}
pub fn write(bytes: []const u8) {
var index: usize = 0;
var src_index: usize = 0;
while (src_index < bytes.len) {
const dest_space_left = 1 - index;
const b = bytes.len - src_index;
const copy_amt = if (dest_space_left < b) dest_space_left else b;
index += copy_amt;
src_index += copy_amt;
}
}
pub fn panic(msg: [...
2017 Sep 17
2
assertion triggered since update to llvm 5
...smallest zig test case to cause the problem:
>>
>>
>> export fn entry() {
>> var bytes: []const u8 = "format";
>> write(bytes);
>> }
>>
>> pub fn write(bytes: []const u8) {
>> var index: usize = 0;
>>
>> var src_index: usize = 0;
>>
>> while (src_index < bytes.len) {
>> const dest_space_left = 1 - index;
>> const b = bytes.len - src_index;
>> const copy_amt = if (dest_space_left < b) dest_space_left else b;
>> index += copy_amt;
>&g...
2017 Sep 17
4
assertion triggered since update to llvm 5
...gt;> export fn entry() {
>>>> var bytes: []const u8 = "format";
>>>> write(bytes);
>>>> }
>>>>
>>>> pub fn write(bytes: []const u8) {
>>>> var index: usize = 0;
>>>>
>>>> var src_index: usize = 0;
>>>>
>>>> while (src_index < bytes.len) {
>>>> const dest_space_left = 1 - index;
>>>> const b = bytes.len - src_index;
>>>> const copy_amt = if (dest_space_left < b) dest_space_left else
>&...
2017 Sep 17
2
assertion triggered since update to llvm 5
...>>>> var bytes: []const u8 = "format";
>>>>> write(bytes);
>>>>> }
>>>>>
>>>>> pub fn write(bytes: []const u8) {
>>>>> var index: usize = 0;
>>>>>
>>>>> var src_index: usize = 0;
>>>>>
>>>>> while (src_index < bytes.len) {
>>>>> const dest_space_left = 1 - index;
>>>>> const b = bytes.len - src_index;
>>>>> const copy_amt = if (dest_space_left < b) dest_s...
2014 Mar 13
2
[LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
----- Original Message -----
> From: "Tom Stellard" <tom at stellard.net>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Sent: Thursday, March 13, 2014 9:46:22 AM
> Subject: Re: [LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
>
> On