search for: src1_high32

...tell LLVM how to emulate an instruction with multiple others? Specifically, in our processor, there is no instruction for adding two i64s; it has to be done like this dst_high32:dst_low32 = src1_low32 + src2_low32 (unsigned add; dst_high might contain the overflow bit) dst_high32 = dst_high32 + src1_high32 dst_high32 = dst_high32 + src2_high32 I tried it with patterns like the following in InstrInfo.td (this is obviously wrong, but you have to start somewhere): def : Pattern<(set LLRegs:$dst, (add LLRegs:$src1, LLRegs:$src2)), [(set LLRegs:$dst, (anyext (add (trunc LLRegs:$src1), (trunc LLRegs...