Displaying 3 results from an estimated 3 matches for "sprs".
Did you mean:
fprs
2012 Sep 04
1
virt-sparsify broken after recent changes
...aemon: 40 bytes: 20 00 f5 f5 | 00 00 00 04 | 00 00 01 1a | 00 00 00 01 | 00 12 34 0c | ...
libguestfs: sending SIGTERM to process 26256
libguestfs: closing guestfs handle 0x1e66470 (state 0)
Fatal error: exception Guestfs.Handle_closed("disk_format")
...
#!/bin/bash
set -x
img=disk.img
sprs=disk.sparse.img
kname=vda
test -f ${img} && exit 1
test -f ${sprs} && exit 1
find /usr/share/ -type f -print0 | xargs -0 cat | dd bs=$(( 1024 * 1024 )) count=$(( 42 )) iflag=fullblock of=${img}
ls -lhsS ${img}
time guestfish -v <<_EOF_
add ${img}
run
part-disk /dev/${kname} m...
2019 Dec 18
2
Spilling to register for a given register class
...IIRC, it basically runs the
> allocator several times:
> - First they allocate GPRs and spill them into SPR, since SPR registers
> are not taken into account during this iteration there is no issue for
> creating new live ranges during spilling for these ones
> - Second they allocate SPRs and they get spilled to memory.
>
> Cheers,
> -Quentin
>
> On Dec 17, 2019, at 1:47 PM, Hendrik Greving via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
> Hello, for an architecture that doesn't have a good way to load/store a
> given register class to memo...
2019 Dec 17
2
Spilling to register for a given register class
Hello, for an architecture that doesn't have a good way to load/store a
given register class to memory, is it instead easy to spill/fill from
another register class instead?
e.g.
- storeRegToStack/loadRegFromStack use a pseudo instruction and add virtual
register operand is not supported (spill optimization doesn't seem to like
this).
- AMDGPU backend seems to do sth. similar?
The only