Displaying 2 results from an estimated 2 matches for "splatinsert6".
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splatinsert
2016 Apr 01
2
RFC: A proposal for vectorizing loops with calls to math functions using SVML
....
This can be seen from inspection of the resulting assembly code just below the
LLVM IR.
vector.body: ; preds = %vector.body, %vector.ph
%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ], !dbg !6
%0 = trunc i64 %index to i32, !dbg !7
%broadcast.splatinsert6 = insertelement <4 x i32> undef, i32 %0, i32 0,
!dbg !7
%broadcast.splat7 = shufflevector <4 x i32> %broadcast.splatinsert6,
<4 x i32> undef, <4 x i32> zeroinitializer, !dbg !7
%induction8 = add <4 x i32> %broadcast.splat7, <i32 0, i32 1, i32 2, i32 3>...
2016 Apr 04
2
RFC: A proposal for vectorizing loops with calls to math functions using SVML
...ing assembly code just below the
LLVM IR.
vector.body: ; preds = %vector.body, %vector.ph<http://vector.ph>
%index = phi i64 [ 0, %vector.ph<http://vector.ph> ], [ %index.next, %vector.body ], !dbg !6
%0 = trunc i64 %index to i32, !dbg !7
%broadcast.splatinsert6 = insertelement <4 x i32> undef, i32 %0, i32 0,
!dbg !7
%broadcast.splat7 = shufflevector <4 x i32> %broadcast.splatinsert6,
<4 x i32> undef, <4 x i32> zeroinitializer, !dbg !7
%induction8 = add <4 x i32> %broadcast.splat7, <i32 0, i32 1, i32 2, i32 3>...