Displaying 11 results from an estimated 11 matches for "spillcodeinsert".
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spillcodeinserter
2017 Aug 19
1
[PATCH] nv50/ra: Only increment DefValue counter if we are going to spill
...etions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index e4f38c8e46..5034f8f989 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -1750,8 +1750,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
// multiple destinations that all need to be spilled (like OP_SPLIT).
unordered_set<Instruction *> to_del;
- for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
- ++d) {
+ for (Value...
2014 Feb 14
0
Regression caused by 2e9ee44797 ("nv50/ir/ra: some register spilling fixes")
...ed a bunch of stuff on NVC0+, so it'd
be nice to get everything working together all at once :)
Below is a backtrace... looks like slot == NULL. Let me know if you
need anything else from me.
Thanks,
-ilia
Program received signal SIGSEGV, Segmentation fault.
0x00007ffff2756598 in nv50_ir::SpillCodeInserter::unspill (
this=0x7fffffffd160, usei=0x76a9a0, lval=0xc08f30, slot=0x0)
at codegen/nv50_ir_ra.cpp:1514
1514 if (slot->reg.file == FILE_MEMORY_LOCAL) {
(gdb) bt
#0 0x00007ffff2756598 in nv50_ir::SpillCodeInserter::unspill (
this=0x7fffffffd160, usei=0x76a9a0, lval=0xc08f30, s...
2014 Sep 25
0
[PATCH] nv50/ir: avoid deleting pseudo instructions too early
...pp
index 4b105b4..d47fed2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -25,6 +25,7 @@
#include <stack>
#include <limits>
+#include <tr1/unordered_set>
namespace nv50_ir {
@@ -1547,6 +1548,11 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
LValue *lval = it->first->asLValue();
Symbol *mem = it->second ? it->second->asSym() : NULL;
+ // Keep track of which instructions to delete later. Deleting them
+ // inside the loop is unsafe since a single...
2017 Aug 11
2
[PATCH] nv50/ir: Initialize all members of GCRA (trivial)
...rc/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 9d70ec3c9c..e4f38c8e46 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -1146,6 +1146,9 @@ GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
regs(fn->getProgram()->getTarget()),
spill(spill)
{
+ nodeCount = 0;
+ nodes = NULL;
+
prog = func->getProgram();
// initialize relative degrees array - i takes away from j
--
2.14.0
2017 Dec 30
1
[PATCH v2] nv50/ir: Initialize all members of GCRA (trivial)
...b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 361918a161..a70a54f6b8 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -1144,7 +1144,9 @@ GCRA::RIG_Node::addRegPreference(RIG_Node *node)
GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
func(fn),
regs(fn->getProgram()->getTarget()),
- spill(spill)
+ spill(spill),
+ nodeCount(0),
+ nodes(NULL)
{
prog = func->getProgram();
--
2.15.1
2014 Jul 08
1
[PATCH] nv50/ir: use unordered_set instead of list to keep our instructions in uses
...gt;uses.front()->getInsn();
+ i = (*insn->getDef(0)->uses.begin())->getInsn();
// if this is a contraint-move there will only be a single use
if (i && i->op == OP_MERGE) // do we really still need this ?
break;
@@ -1559,7 +1559,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
// Unspill at each use *before* inserting spill instructions,
// we don't want to have the spill instructions in the use list here.
while (!dval->uses.empty()) {
- ValueRef *u = dval->uses.front();...
2014 May 30
4
[Bug 79462] New: [NVC0/Codegen] Shader compilation falis in spill logic
...Version: unspecified
Component: Drivers/DRI/nouveau
Product: Mesa
Created attachment 100179
--> https://bugs.freedesktop.org/attachment.cgi?id=100179&action=edit
failing tgsi shader
The attached shader fails in the RA step, when inserting spill code:
nv50_ir::SpillCodeInserter::run (this=0x7ffffffec0c0, lst=std::list)
at codegen/nv50_ir_ra.cpp:1561
1561 while (!dval->uses.empty()) {
Easily reproduced with nouveau_compiler -a c0. Apparently this shader is
generated as part of the d3d9 st, with skyrimlauncher, when it's trying to
detect the graphi...
2014 Sep 01
0
[PATCH] nv50/ir: use unordered_set instead of list to keep track of var defs
...ool success)
} else {
for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
++d)
- lval->join->defs.remove(*d);
+ lval->join->defs.erase(*d);
lval->join = lval;
}
}
@@ -1547,8 +1547,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
LValue *lval = it->first->asLValue();
Symbol *mem = it->second ? it->second->asSym() : NULL;
- for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
- ++d) {
+ for (Value::Def...
2014 Dec 02
0
[PATCH RESEND] nv50/ir: use unordered_set instead of list to keep track of var defs
...ool success)
} else {
for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
++d)
- lval->join->defs.remove(*d);
+ lval->join->defs.erase(*d);
lval->join = lval;
}
}
@@ -1553,8 +1553,7 @@ SpillCodeInserter::run(const std::list<ValuePair>& lst)
// multiple destinations that all need to be spilled (like OP_SPLIT).
std::tr1::unordered_set<Instruction *> to_del;
- for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
- ++d) {
+...
2017 Dec 29
0
[PATCH] nv50/ir: Initialize all members of GCRA (trivial)
...ouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> index 9d70ec3c9c..e4f38c8e46 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> @@ -1146,6 +1146,9 @@ GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
> regs(fn->getProgram()->getTarget()),
> spill(spill)
> {
> + nodeCount = 0;
> + nodes = NULL;
> +
> prog = func->getProgram();
>
> // initialize relative degrees array - i takes away from j
> --
> 2.14.0
>
> _...
2015 May 06
4
[Bug 90348] New: Spilling failure of b96 merged value
...t alum.mit.edu
QA Contact: nouveau at lists.freedesktop.org
Sometimes the spilling logic will decide to spill a merged def. This is fine
for 2- and 4-wide values as there are appropriate load/store instructions for
those, but not so with 3-wide values. We must take that into account in the
SpillCodeInserter and emit a 64-bit and 32-bit store into lmem (and similar for
load, although less important, as it tends to have gotten split up by the time
the use rolls around).
Unfortunately I've lost track of the program that repro'd this issue.
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