Displaying 4 results from an estimated 4 matches for "spillall".
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2012 Oct 30
2
[LLVMdev] [PATCH][Review request] MachineBasicBlock::iterator bug fix
...est cases that reproduce on an X86 machine the problems
that this patch fixes (these bugs were found when make check was run on a
mips board).
Please review.
The first part just ensures that iterator I is not instr_end() before it
invokes isInsideBundle().
The second part changes the signature of spillAll to avoid the conversion
from MachineBasicBlock::iterator to MachineInstr* and back to
MachineBasicBlock::iterator.
Here is the backtrace:
(gdb) bt
#0 0x2ad46fb8 in raise () from /lib/libc.so.6
#1 0x2ad4c178 in abort () from /lib/libc.so.6
#2 0x2ad3e178 in __assert_fail () from /lib/libc.so.6
#3 0...
2014 Oct 14
2
[LLVMdev] Problem of stack slot coloring
...> }
> >
> >
> > And I found the greedy register allocator did nothing to fill the
> > LiveStackAnalysis:: S2IMap, which is critical for the stack slot
> > coloring.
>
> It seems that the relevant piece of code is in
lib/CodeGen/InlineSpiller.cpp:
>
> /// spillAll - Spill all registers remaining after rematerialization.
> void InlineSpiller::spillAll() {
> // Update LiveStacks now that we are committed to spilling.
> if (StackSlot == VirtRegMap::NO_STACK_SLOT) {
> StackSlot = VRM.assignVirt2StackSlot(Original);
> StackInt = &LS...
2014 Oct 13
2
[LLVMdev] Problem of stack slot coloring
Hi,
Can anyone help me with the stack slot coloring optimization?
This corresponding file is /lib/codegen/stackslotcoloring.cpp.
It is said this optimization was for stack slot overlay for frame size
reduction, after register allocation phase.
And this transformation pass relies on the LiveStack analysis pass.
How, when checking the source code, it seems the LiveStack analysis has not
been
2010 Jun 04
1
[LLVMdev] Heads up: Local register allocator going away
...pad is going to expect to find registers
> // in their spill slots, and 2. we don't have to wade through all the
> // <imp-def> operands on the call instruction.
> DefOpEnd = VirtOpEnd;
> DEBUG(dbgs() << " Spilling remaining registers before call.\n");
> spillAll(MI);
> }
>
> if I remove this block this fix the bug: LR is marked used with
> MRI->addPhysRegsUsed(UsedInInstr)
> and LR is correctly saved and restored in the function prolog/epilog.
>
> Is this code really usefull ? :D
Yes, calls can have ridiculously long lists of clo...