Displaying 3 results from an estimated 3 matches for "sparcgenasmwrit".
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sparcgenasmwriter
2010 Jan 01
2
[LLVMdev] Assembly Printer
...ot;mysra" instead of "sra",
in SparcInstrInfo.td, I would write,
defm SRA : F3_12<"mysra", 0b100111, sra>;
Is this correct?
When I run llc with option -march=sparc, after I make the modification, it
still outputs "sra", not "mysra". I looked into SparcGenAsmWriter.inc, and
made sure that string AsmStrs includes "mysra". However, when I run gdb and
do "print AsmStrs + (Bits & 1023)", it prints "sra".
Does this make sense or am I just overlooking something?
The second question is about pattern matching of instructions.
I fo...
2010 Jan 03
0
[LLVMdev] Assembly Printer
...ra", in SparcInstrInfo.td, I would write,
>
> defm SRA : F3_12<"mysra", 0b100111, sra>;
>
> Is this correct?
Yes.
> When I run llc with option -march=sparc, after I make the modification, it still outputs "sra", not "mysra". I looked into SparcGenAsmWriter.inc, and made sure that string AsmStrs includes "mysra". However, when I run gdb and do "print AsmStrs + (Bits & 1023)", it prints "sra".
> Does this make sense or am I just overlooking something?
Sounds like something is being overlooked. Perhaps tblgen d...
2012 Nov 13
2
[LLVMdev] [PATCH] .gitignore: add rules for a clean worktree
...r.inc
+PPCGenDAGISel.inc
+PPCGenInstrInfo.inc
+PPCGenMCCodeEmitter.inc
+PPCGenRegisterInfo.inc
+PPCGenSubtargetInfo.inc
diff --git a/lib/Target/Sparc/.gitignore b/lib/Target/Sparc/.gitignore
new file mode 100644
index 0000000..3708810
--- /dev/null
+++ b/lib/Target/Sparc/.gitignore
@@ -0,0 +1,6 @@
+SparcGenAsmWriter.inc
+SparcGenCallingConv.inc
+SparcGenDAGISel.inc
+SparcGenInstrInfo.inc
+SparcGenRegisterInfo.inc
+SparcGenSubtargetInfo.inc
diff --git a/lib/Target/X86/.gitignore b/lib/Target/X86/.gitignore
new file mode 100644
index 0000000..13e4a62
--- /dev/null
+++ b/lib/Target/X86/.gitignore
@@ -0,0 +1,11...