Displaying 3 results from an estimated 3 matches for "sparcdagtodagisel".
2010 Jan 01
2
[LLVMdev] Assembly Printer
...nd "sdiv" don't seem to have any
patterns specified.
defm UDIV : F3_12np<"udiv", 0b001110>;
defm SDIV : F3_12np<"sdiv", 0b001111>;
Is this because these instructions are handled differently from other
instructions in SparcISelDAGToDAG.cpp?
In function SparcDAGToDAGISel::Select(SDValue Op), instruction selection for
"sdiv" and "udiv" is done in the switch-case statement, while SelectCode(Op)
takes care of the other instructions*.
*
Thank you..
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2010 Jan 03
0
[LLVMdev] Assembly Printer
...m to have any patterns specified.
>
> defm UDIV : F3_12np<"udiv", 0b001110>;
> defm SDIV : F3_12np<"sdiv", 0b001111>;
>
> Is this because these instructions are handled differently from other instructions in SparcISelDAGToDAG.cpp?
> In function SparcDAGToDAGISel::Select(SDValue Op), instruction selection for "sdiv" and "udiv" is done in the switch-case statement, while SelectCode(Op) takes care of the other instructions.
Yep, exactly,
-Chris
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2014 Sep 01
3
[LLVMdev] understanding DAG: node creation
Hi,
I'm not sure. But in your lowered DAG the chain nodes are the first
operands for you custom nodes, however for the other nodes the chain is
the last operand. I seem to remember that during targetlowering the
chain is the first operand and then it seems to switch over after
ISelDAG, this confused me and may have something to do with the issue
that you are seeing. I really don't