search for: spadj

...sert(ScavengingFrameIndex >= 0 && "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI); MachineBasicBlock::iterator II = prior(I); TRI->eliminateFrameIndex(II, SPAdj, this); // Restore the scavenged register before its use (or first terminator). TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI); II = prior(UseMI); TRI->eliminateFrameIndex(II, SPAdj, this); }

...store and load use the same immediate offset. I see code in the PEI (replaceFrameIndices) that is supposed to track the SP/FP adjustment: ---------------------------------------- void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn, int &SPAdj) { const TargetMachine &TM = Fn.getTarget(); assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!"); const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); const TargetRegisterInfo &TRI = *TM.getRegisterInfo(); const...

...Index >= 0 && > "Cannot scavenge register without an emergency spill slot!"); > TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, > RC,TRI); > MachineBasicBlock::iterator II = prior(I); > TRI->eliminateFrameIndex(II, SPAdj, this); > > // Restore the scavenged register before its use (or first terminator). > TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, > TRI); > II = prior(UseMI); > TRI->eliminateFrameIndex(II, SPAdj, this); > } > > _________...

...custom processor backend I am trying add some instruction using BuildMI() inside eliminateFrameIndex(). I tried RegScavenger like this: unsigned RegUnused0 = RS->FindUnusedReg(&LASER::GNPRegsRegClass); if (!RegUnused0) RegUnused0 = RS->scavengeRegister(&LASER::GNPRegsRegClass, II, SPAdj); assert(RegUnused0 && "Register scavenger failed"); RS->setRegUsed(RegUnused0); It works but there are two issues: 1) I need to registers and RegScavenger only returns one. 2) I cannot unset the used register and I get spill slot error message when I ran out of the available...

...immediate offset. > > I see code in the PEI (replaceFrameIndices) that is supposed to track the SP/FP adjustment: > > ---------------------------------------- > void PEI::replaceFrameIndices(MachineBasicBlock *BB, > MachineFunction &Fn, int &SPAdj) { > const TargetMachine &TM = Fn.getTarget(); > assert(TM.getRegisterInfo() && > "TM::getRegisterInfo() must be implemented!"); > const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); > const TargetRegisterInfo &TRI = *TM.getRegisterI...

...e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isFrameIndex()) { // If this instruction has a FrameIndex operand, we need to use // that // target machine register info object to eliminate it. MRI.eliminateFrameIndex(MI, SPAdj, RS); // Revisit the instruction in full. Some instructions (e.g. // inline // asm instructions) can have multiple frame indices. --I; MI = 0; break; } } // Update register states. if (RS &&am...

...;> I see code in the PEI (replaceFrameIndices) that is supposed to track >> the SP/FP adjustment: >> >> ---------------------------------------- >> void PEI::replaceFrameIndices(MachineBasicBlock *BB, >> MachineFunction &Fn, int &SPAdj) { >> const TargetMachine &TM = Fn.getTarget(); >> assert(TM.getRegisterInfo() && >> "TM::getRegisterInfo() must be implemented!"); >> const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); >> const TargetRegisterInfo &TR...

Hi, We are currently developing an LLVM target for a micro-controller, and would like our TargetLowering::LowerCall method to emit PUSH instructions (instead of STORE) to pass arguments (which would improve code density for function calls). Is there a way of keeping track of the stack pointer changes implied by the PUSH instruction to calculate the correct offsets in

...the PEI (replaceFrameIndices) that is supposed to track >>> the SP/FP adjustment: >>> >>> ---------------------------------------- >>> void PEI::replaceFrameIndices(MachineBasicBlock *BB, >>> MachineFunction &Fn, int &SPAdj) { >>> const TargetMachine &TM = Fn.getTarget(); >>> assert(TM.getRegisterInfo() && >>> "TM::getRegisterInfo() must be implemented!"); >>> const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); >>> const TargetRegis...

...meIndices) that is supposed to track >>>> the SP/FP adjustment: >>>> >>>> ---------------------------------------- >>>> void PEI::replaceFrameIndices(MachineBasicBlock *BB, >>>> MachineFunction &Fn, int &SPAdj) { >>>> const TargetMachine &TM = Fn.getTarget(); >>>> assert(TM.getRegisterInfo() && >>>> "TM::getRegisterInfo() must be implemented!"); >>>> const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); >>>&g...

...hat we can // revisit them in full. bool AtBeginning = (I == BB->begin()); if (!AtBeginning) --I; // If this instruction has a FrameIndex operand, we need to // use that target machine register info object to eliminate // it. TRI.eliminateFrameIndex(MI, SPAdj, i, FrameIndexVirtualScavenging ? nullptr : RS); Regards, Dominique Torette. [http://www.spacebel.be/wp-content/uploads/2011/06/image-sign-sbp.jpg] Dominique Torette System Architect Rue des Chasseurs Ardennais - Liège Science Park - B-4031 Angleur T...