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2015 Jul 02
2
libguestfs error: need help troubleshooting
Hi, I'm trying to manually create a rhel7 image using the qemu-img and virt-install commands. I'm re-testing a procedure I previously wrote with the new grub commands that a customer suggested we add in. This procedure is available at: http://file.bne.redhat.com/dnavale/docs/review/RH-guides/AG-020715/#sect-create-images As in the procedure, I'm able to run all steps successfully
2013 Feb 15
2
data formatting
...? Lines2<-Lines1[Lines1!=""] library(stringr) ?str_count(Lines2, " ") # [1] 7 7 7 7 6 7 7 7 7 7 6 6 7 7 7 7 6 7 7 7 7 7 6 6 Lines2[str_count(Lines2," ")==7]<- str_replace(Lines2[str_count(Lines2," ")==7],"\\s+","???? ") #reduced 2 spaces ?Lines2[str_count(Lines2," ")==6]<- str_replace(Lines2[str_count(Lines2," ")==6],"\\s+","??? ") #reduced 2 spaces ?str_count(Lines2," ") # [1] 5 5 5 5 4 5 5 5 5 5 4 4 5 5 5 5 4 5 5 5 5 5 4 4 substr(Lines2[substr(Lines2,6,6)==0|substr(Lines2,9,9)...
2015 Jul 03
1
Re: libguestfs error: need help troubleshooting
Hi Rich, I'm not sure how far this helps as it mostly says 'No space left on device', but here's the output of the command you asked me to run: ➜ tmp /usr/bin/supermin --build -v -v -v --copy-kernel -f ext2 --host-cpu x86_64 /usr/lib64/guestfs/supermin.d -o /tmp/appliance.d supermin: version: 5.1.9 supermin: rpm: detected RPM version 4.11 supermin: package handler: fedora/rpm
2012 Feb 13
1
Samba winbind and nfsv4 krb5
Hi All, I'm struggling since weeks to get samba winbind and a kerberized nfs mount running. We have a Netapp SAN exporting the nfs share with sec=krb5 and a Linux Client Ubuntu 10.04 Server trying to access the exported share. Accessing the share without krb5 (sec=sys) works fine. The linux machine is joined to an Windows 2008R2 domain and user/group lookups login via ssh etc. work fine. I
2011 Feb 28
3
[LLVMdev] Language-specific vs target-specific address spaces (was Re: [PATCH] OpenCL support - update on keywords)
On Fri, Feb 25, 2011 at 02:55:33PM -0500, Ken Dyck wrote: > The address space mechanism is used by some code generators to > differentiate between physical memory spaces. The PIC16 code generator > uses address spaces 0 and 1 to select between its RAM and ROM spaces. > And X86 uses address space 256 for GS and 257 for FS. In the back end > for a dual-harvard DSP that I've been working on, I use address spaces > 0-3 to designate the various memories...
2020 Sep 07
2
pcieport 0000:00:01.0: PME: Spurious native interrupt (nvidia with nouveau and thunderbolt on thinkpad P73)
On Mon, Sep 07, 2020 at 09:14:03PM +0200, Karol Herbst wrote: > > - changes in the nouveau driver. Mika told me the PCIe regression > > "pcieport 0000:00:01.0: PME: Spurious native interrupt!" is supposed > > to be fixed in 5.8, but I still get a 4mn hang or so during boot and > > with 5.8, removing the USB key, didn't help make the boot faster >
2017 Jul 11
6
RFC: Harvard architectures and default address spaces
...e RAM “data space”, which corresponds to the default address space 0. This is important because loads/stores use different instruction/pointer formats depending on the address space used, and so we need correct address space information available to the backend itself. Due to the fact that address spaces in LLVM default to 0, this means that all global or constant variables default to living inside data space. This causes a few issues, including the fact that the SimplifyCFG pass creates switch lookup tables, which default to data space, causing us to emit broken table lookups and also wasting prec...
2004 Jun 21
2
Bug#255560: logcheck-database: More Postfix rules
Package: logcheck-database Version: 1.2.22a Severity: normal Thanks to the upgrade to Postfix 2.1 and deploying a newer logcheck ruleset on a busier server I've found a bunch more rules for Postfix. I've attached new rules files and patches are inline. The following patch is for violations.ignore.d: --- logcheck-postfix.orig 2004-06-21 20:11:14.000000000 +0100 +++ logcheck-postfix
2015 Aug 07
2
[RFC] BasicAA considers address spaces?
...08/07/2015 12:22 PM, Daniel Berlin via llvm-dev wrote: > Sorry to be pedantic, but i think it's important to make sure we are > all on the same page that backends can't change the aliasing behavior > of the default address space, only the aliasing behavior of the other > address spaces. Are you saying that we can't say address space 0 doesn't alias other address spaces? In this case we really need to fix LLVM's concept of default address space because this is highly problematic for us. We're constrained to use it in some cases because we can't alloca in a...
2013 Aug 10
2
[LLVMdev] Address space extension
> [Micah Villmow] The backends won't understand your address space mapping. The backends should expose their address spaces that they support, their sizes and their overall semantics. It should be documented just like the calling convention is documented. It is then the job of the frontend to map whatever source language address spaces are used onto the correct address spaces for the target. For example, the AMDIL backe...
2013 Aug 07
4
[LLVMdev] Address space extension
...rote: >> >> IMHO this information should be a plus that could be *safely* ignored when not necessary and used where it can provide an improvement in optimizations. This does not necessary mean the the middle-end (and the back-ends) must be aware of the semantic of these logical address spaces, it would be enough just to distinguish between two logically different address spaces. >> The first application I see is alias analysis: for targets that do not have different physical address spaces (e.g. X86), meaning that in the IR the 'addrspace' modifier *should* not be present...
2013 Aug 08
5
[LLVMdev] Address space extension
...2013, at 5:12 PM, Michele Scandale <michele.scandale at gmail.com> wrote: >> >>> On 08/08/2013 02:02 AM, Justin Holewinski wrote: >>>> This worries me a bit. This would introduce language-specific >>>> processing into SelectionDAG. OpenCL maps address spaces one way, other >>>> languages map them in other ways. Currently, it is the job of the >>>> front-end to map pointers into the correct address space for the target >>>> (hence the address space map in clang). With (my understanding of) this >>>> prop...
2011 Oct 13
2
[LLVMdev] [cfe-dev] RFC: Representation of OpenCL Memory Spaces
...proach for AA support. > > This doesn't solve the problem of different frontend/backends choosing different > address space representations for the same language, but is the correct > approach for providing extra information to the optimizations. > > The issue about memory spaces in general is a little different. For example, based on > the code you posted below, address space 0(default) is global in CUDA, but > in OpenCL, the default address space is private. So, how does the ptx backend > handle the differences? I think this is problematic as address spaces &gt...
2008 Jul 17
0
[LLVMdev] Casting between address spaces and address space semantics
...make it accept a pointer in the generic address space (ie, no > address space attribute): > > void do_stuff(char* mem); The "generic address space" you're referring to is really just address space 0, at least in the current implementation. Assuming alternate address spaces are actually separate, passing a pointer from a different address space to this function is undefined behavior. > However, this brings me to my actual question: How are address spaces > semantically defined? I see two options here: > > a) Every address space has the full range of addre...
2008 Jul 17
2
[LLVMdev] Casting between address spaces and address space semantics
Hi all, I'm currently struggling a bit with some problems regarding address spaces and (implicit) casts. I'll explain some context first and then proceed to the actual question I'd like to have answered. In our target platform, we have a number of distinctly different memory banks. To access these from our C code, we declare a global array for each memory, with the addre...
2011 Mar 01
0
[LLVMdev] Language-specific vs target-specific address spaces (was Re: [PATCH] OpenCL support - update on keywords)
On Mon, Feb 28, 2011 at 4:41 PM, Peter Collingbourne <peter at pcc.me.uk> wrote: > > The more I think about it, the more I become uncomfortable with the > concept of language-specific address spaces in LLVM.  These are the > main issues I see with language-specific address spaces: ... > Instead of language-specific address spaces, each target should > concentrate on exposing all of its address spaces as target-specific > address spaces, and frontends should use a language -> t...
2011 Oct 14
3
[LLVMdev] [cfe-dev] RFC: Representation of OpenCL Memory Spaces
...9;t solve the problem of different frontend/backends choosing > > different > > > address space representations for the same language, but is the correct > > > approach for providing extra information to the optimizations. > > > > > > The issue about memory spaces in general is a little different. For > > example, based on > > > the code you posted below, address space 0(default) is global in CUDA, > > but > > > in OpenCL, the default address space is private. So, how does the ptx > > backend > > > handle the diff...
2011 Mar 02
1
[LLVMdev] Language-specific vs target-specific address spaces (was Re: [PATCH] OpenCL support - update on keywords)
On Tue, Mar 1, 2011 at 4:06 PM, David Neto wrote: > On Mon, Feb 28, 2011 at 4:41 PM, Peter Collingbourne wrote: >> >> The more I think about it, the more I become uncomfortable with the >> concept of language-specific address spaces in LLVM.  These are the >> main issues I see with language-specific address spaces: > > ... > >> Instead of language-specific address spaces, each target should >> concentrate on exposing all of its address spaces as target-specific >> address spaces, and frontends...
2013 Aug 08
0
[LLVMdev] Address space extension
...: > > > On Aug 7, 2013, at 5:12 PM, Michele Scandale <michele.scandale at gmail.com> > wrote: > > On 08/08/2013 02:02 AM, Justin Holewinski wrote: > > This worries me a bit. This would introduce language-specific > processing into SelectionDAG. OpenCL maps address spaces one way, other > languages map them in other ways. Currently, it is the job of the > front-end to map pointers into the correct address space for the target > (hence the address space map in clang). With (my understanding of) this > proposal, there would be a pre-defined set of langua...
2020 Sep 07
0
pcieport 0000:00:01.0: PME: Spurious native interrupt (nvidia with nouveau and thunderbolt on thinkpad P73)
On Mon, Sep 7, 2020 at 10:58 PM Marc MERLIN <marc_nouveau at merlins.org> wrote: > > On Mon, Sep 07, 2020 at 09:14:03PM +0200, Karol Herbst wrote: > > > - changes in the nouveau driver. Mika told me the PCIe regression > > > "pcieport 0000:00:01.0: PME: Spurious native interrupt!" is supposed > > > to be fixed in 5.8, but I still get a 4mn hang