Displaying 4 results from an estimated 4 matches for "sp_at_entry".
2013 Jun 19
2
[LLVMdev] ARM struct byval size > 64 triggers failure
I missed that the testing case is returning a struct.
You are right in VARegSaveSize.
For callee:
sub sp, sp, #16
push {r11, lr}
mov r11, sp
sub sp, sp, #8
str r3, [r11, #20]
str r2, [r11, #16]
str r1, [r11, #12]
ldr r1, [r11, #76]
The beginning of the input struct @ sp_at_entry - 16 - 8 + 12 = sp_at_entry -12
# of leftover bytes 67-12 = 55
r11+76 is @ sp_at_entry - 24 + 76 = sp_at_entry + 52, this is incorrect, it should be at align(55, 4) = 56.
For caller:
mov r0, sp
ldr r1, .LCPI1_0
str r1, [r0, #56]
the 2nd argument is at sp_at_entry + 56, which is correct.
On my...
2013 Jun 20
1
[LLVMdev] ARM struct byval size > 64 triggers failure
...Size.
> >
> > For callee:
> > subsp, sp, #16
> > push{r11, lr}
> > movr11, sp
> > subsp, sp, #8
> > strr3, [r11, #20]
> > strr2, [r11, #16]
> > strr1, [r11, #12]
> > ldrr1, [r11, #76]
> >
> > The beginning of the input struct @ sp_at_entry - 16 - 8 + 12 =
> > sp_at_entry -12
> > # of leftover bytes 67-12 = 55
> > r11+76 is @ sp_at_entry - 24 + 76 = sp_at_entry + 52, this is incorrect,
> > it should be at align(55, 4) = 56.
> >
> > For caller:
> > movr0, sp
> > ldrr1, .LCPI1_0
> >...
2013 Jun 18
0
[LLVMdev] ARM struct byval size > 64 triggers failure
...use we store the first 16 bytes of struct byval in r0 to r3.
Align in computeRegArea is 8 since ABI says the stack pointer needs to be 8 byte aligned at function entry point.
But the second argument does not have to be 8 byte aligned, in fact it is 4 byte aligned for i32.
r11, #76 is equivalent to sp_at_entry + 52 since r11 = spat_entry - 16 - 8, which is 4-byte aligned after
storing the leftover (67-16=51) bytes of struct byval.
Can you also paste the assembly for the caller side and check whether the second argument is stored
at sp_at_entry+52?
As Renato suggested, please file a bug report.
Thanks,...
2013 Jun 18
3
[LLVMdev] ARM struct byval size > 64 triggers failure
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