search for: softirq_pending

Doing some janitorial (you cleaning the flooded toilets and such) work today. I have come across this line of code that really I''m not sure what the intent was..in xen/include/sched.h #define hypercall_preempt_check() (unlikely( \ softirq_pending(smp_processor_id()) | \ (!!current->vcpu_info->evtchn_upcall_pending & \ !current->vcpu_info->evtchn_upcall_mask) \ )) the part where we have !!current->vcpu_info_evtchen_upcall pending should this be..should the "!! just be "!&quo...

...on is run because its execution can be delayed a long time. Moreover, binding a function to a CPU is always a potentially "dangerous" operation, because one CPU might end up very busy while the others are mostly idle." I think in Xen, the same approach is taken from what I can tell (softirq_pending is keyed by cpu, used both in activation (cpu_raise_softirq) and execution (do_softirq)). Is there room for optimization here? I''m looking at Xen''s softirq mechanism and just noticed this, that''s all. I have no performance data or anything. In Xen, when would the hard...

What is the point of specifying "current" as the address to monitor? The memory location of interest really is irq_stat[cpu].__softirq_pending, and if that was used it would then also be possible to actually avoid sending IPIs when monitor/mwait are in use, as is being done on Linux. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

As mentioned earlier, PowerPC''s atomic ops operate on longs, and we have made our *_bit() prototypes use long* (instead of void*) to warn us of problems at compile time. Here''s one caller that was flagged: test_and_set_bit(nr, &softirq_pending(cpu)) Accordingly, we need __softirq_pending to be long, not int. PowerPC is currently using a few files unmodified from the x86 versions; hardirq.h is one of them. We could copy asm-x86/hardirq.h and change the type of this one field, but that leads to maintenance headaches down the road. Inst...

From: Yang Zhang <yang.z.zhang@Intel.com> The follwoing patches are adding the Posted Interrupt supporting to Xen: Posted Interrupt allows vAPIC interrupts to inject into guest directly without any vmexit. - When delivering a interrupt to guest, if target vcpu is running, update Posted-interrupt requests bitmap and send a notification event to the vcpu. Then the vcpu will handle this

The self_nmi() code cause''s an NMI to be triggered by sending an APIC message to the local processor. However, NMIs are blocked by the VMEXIT, until the next iret or VMENTER. Volume 3 Chapter 27 Section 1 of the Intel SDM states: An NMI causes subsequent NMIs to be blocked, but only after the VM exit completes. As a result, as soon as the VMENTER happens, an immediate VMEXIT happens

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See