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...l.com>>: > > > > On Sat, Feb 21, 2015 at 6:38 PM, David Chisnall > <David.Chisnall at cl.cam.ac.uk <mailto:David.Chisnall at cl.cam.ac.uk>> > wrote: > > > > On 21 Feb 2015, at 05:59, Jeehoon Kang > <jeehoon.kang at sf.snu.ac.kr <mailto:jeehoon.kang at sf.snu.ac.kr>> > wrote: > > > > this is Jeehoon Kang, a CS PhD student and a newbie to LLVM. > > > > I am wondering why LLVM IR's basic block consists of a list > of instructions...

On Sat, Feb 21, 2015 at 6:38 PM, David Chisnall <David.Chisnall at cl.cam.ac.uk > wrote: > > > On 21 Feb 2015, at 05:59, Jeehoon Kang <jeehoon.kang at sf.snu.ac.kr> > wrote: > > > > this is Jeehoon Kang, a CS PhD student and a newbie to LLVM. > > > > I am wondering why LLVM IR's basic block consists of a list of > instructions, > > rather than a DAG of instruction as in the low level (ISelectionDAG). > >...

...( http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-April/061238.html). I am a newbie to LLVM (and compiler in general), so I could not understand the rationale behind the proposal. Would you please give me some advice on this matter? Thanks, Jeehoon -- Jeehoon Kang (Ph.D. student) <http://sf.snu.ac.kr/jeehoon.kang> Software Foundations Laboratory <http://sf.snu.ac.kr> Seoul National University <http://www.snu.ac.kr> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150221/3e55a74b/attach...

Hi LLVMDev, this is Jeehoon Kang, a Ph.D. student of Software Foundations Laboratory ( http://sf.snu.ac.kr), Dept. of Computer Science & Engineering, Seoul National University. Our group studied the mem2reg pass, and we got a question on its algorithm. As far as I understand, the mem2reg pass essentially uses the SSA construction algorithm to promote allocas into registers, but there are sho...

...vm-dev <llvm-dev at lists.llvm.org> Subject: [EXT] Re: [llvm-dev] Is it valid to dereference a pointer that have undef bits in its offset? > %p2 = gep %p, (undef & 8) A silly typo: undef & 8 -> undef & 7 On Mon, Sep 21, 2020 at 7:47 AM Juneyoung Lee <juneyoung.lee at sf.snu.ac.kr<mailto:juneyoung.lee at sf.snu.ac.kr>> wrote: Hello all, Is it valid to dereference a pointer that has undef bits in its offset? For example, %p = alloca [8 x i8] %p2 = gep %p, (undef & 8) store 0, %p2 undef & 8 is always less than 8, so technically it will store zero to...

...llvm-dev] Is it valid to dereference a pointer >> that have undef bits in its offset? >> >>> %p2 = gep %p, (undef & 8) >> A silly typo: undef & 8 -> undef & 7 >> >> On Mon, Sep 21, 2020 at 7:47 AM Juneyoung Lee >> <juneyoung.lee at sf.snu.ac.kr<mailto:juneyoung.lee at sf.snu.ac.kr>> wrote: >> Hello all, >> >> Is it valid to dereference a pointer that has undef bits in its offset? >> >> For example, >> >> %p = alloca [8 x i8] >> %p2 = gep %p, (undef & 8) >> store 0, %...

...ns RegMask. To update the RegMask of MI , setRegMask() function has been added to MachineOperand, a command line option -enable-ipra and debug type -debug-only=“ipra" has been added to control the optimization through llc. Testing: ===== The above mentioned implementation has been tested over SNU-Real-Time benchmark suit (http://www.cprover.org/goto-cc/examples/snu.html) and some simple programs that uses library function ( for a library function register allocation is not done by LLVM so this optimization will simply skip them) Study and Other: ============= I have learned following thing...

Hello all, Is it valid to dereference a pointer that has undef bits in its offset? For example, %p = alloca [8 x i8] %p2 = gep %p, (undef & 8) store 0, %p2 undef & 8 is always less than 8, so technically it will store zero to one of the array's elements. The reason is that I want to improve no-undef analysis by suggesting that a pointer that is passed to load/store is

...Scalar/GVN.cpp llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp We checked all reports in the LLVM bugzilla (https://bugs.llvm.org/), so I'd like to ask if you know any such a bug that is not reported in the bugzilla. Thanks, Jeehoon Kang -- Jeehoon Kang (Ph.D. student) <http://sf.snu.ac.kr/jeehoon.kang> Software Foundations Laboratory <http://sf.snu.ac.kr> Seoul National University <http://www.snu.ac.kr> -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180410/36689932/attach...

...gt; that have undef bits in its offset? > >>> > >>>> %p2 = gep %p, (undef & 8) > >>> A silly typo: undef & 8 -> undef & 7 > >>> > >>> On Mon, Sep 21, 2020 at 7:47 AM Juneyoung Lee > >>> <juneyoung.lee at sf.snu.ac.kr<mailto:juneyoung.lee at sf.snu.ac.kr>> wrote: > >>> Hello all, > >>> > >>> Is it valid to dereference a pointer that has undef bits in its offset? > >>> > >>> For example, > >>> > >>> %p = alloca [8 x...

...y } ---------------------------------------------- Anyone can help me? Sincerely, =========================================== Dong H. Oh Ph. D Candidate Techno-Economics and Policy Program College of Engineering, Seoul National University, Seoul, 151-050, Republic of Korea E-mail:doriaba2 at snu.ac.kr Mobile: +82-10-6877-2109 Office : +82-2-880-9142 Fax: +82-2-880-8389

...practice. Thanks, Nuno -----Original Message----- From: Eli Friedman <efriedma at quicinc.com> Sent: 27 de novembro de 2019 01:10 To: Nuno Lopes <nuno.lopes at ist.utl.pt>; LLVMdev <llvm-dev at lists.llvm.org> Cc: spatel at rotateright.com; Juneyoung Lee <juneyoung.lee at sf.snu.ac.kr>; zhengyang-liu at hotmail.com; John Regehr <regehr at cs.utah.edu> Subject: RE: LangRef semantics for shufflevector with undef mask is incorrect The shuffle mask of a shufflevector is special: it's required to be a constant in a specific form. From LangRef: "The shuffle m...

...le' value. In our suggestion, well-defined bits are stored into padding at object creation, so it becomes okay. Juneyoung On Fri, Oct 9, 2020 at 11:58 PM Hubert Tong < hubert.reinterpretcast at gmail.com> wrote: > On Thu, Oct 8, 2020 at 11:54 PM Juneyoung Lee <juneyoung.lee at sf.snu.ac.kr> > wrote: > >> // Members are initialized to poison at object creation. >>>> p = alloca {i8, i32} // p[0], p[4~7] are poison >>>> p[0] is an i8, so it shouldn't be poison? >>> >>> >> My interpretation of standard is that readi...

...eplaced by DenseMap of > GlobalVariable * to RegMask. > DummyCGSCCPass moved from TargetPassConfig.cpp to CallGraphSCCPass.h. > Minor correction in comments, changes to adhere coding standards of LLVM. > > Testing: > ===== > > The above mentioned changes has been tested with SNU-Realtime benchmarks. > > Studied lit and FileCheck tool and written simple test to verify > functionality of coding. > > > Study and other: > > ============ > > Studied some examples of lit compatible llvm IR with comments to RUN test > cases, FileCheck tool syntax...

On Tue, Apr 10, 2018 at 3:09 PM, Daniel Berlin via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > On Tue, Apr 10, 2018 at 10:28 AM, Friedman, Eli via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> On 4/9/2018 8:19 PM, Jeehoon Kang via llvm-dev wrote: >> >> Dear llvm-dev, >> >> >> Hi! We're collecting mis-compilation

...start migrate our platform to LLVM. In my experience, you need to take care the follow part: * ARMBaseRegisterInfo::getRegPressureLimit * ARMBaseRegisterInfo::getRawAllocationOrder * CalleeSavedRegs * ARMFrameLowering::emitPrologue [1] Doubling the Number of Registers on ARM Processors http://aces.snu.ac.kr/interact-16/papers/interact-16-paper-1.pdf

...sts in R. Looking forward to hearing from you. Best, ========================================================= Center of Excellence for Science and Innovation Studies, Royal Institute of Technology Drottning Kristinas v?g 30 100 44 Stockholm, Sweden e-mail: donghoh at infra.kth.se, doriaba2 at snu.ac.kr, oh.dongh at gmail.com Office: +46 8 790 67 93 Fax: +46 8 790 95 17 Cell phone: +46 73 563 45 22 =========================================================

...GlobalVariable * to RegMask. >> DummyCGSCCPass moved from TargetPassConfig.cpp to CallGraphSCCPass.h. >> Minor correction in comments, changes to adhere coding standards of LLVM. >> >> Testing: >> ===== >> >> The above mentioned changes has been tested with SNU-Realtime benchmarks. >> >> Studied lit and FileCheck tool and written simple test to verify >> functionality of coding. >> >> >> Study and other: >> >> ============ >> >> Studied some examples of lit compatible llvm IR with comments to RUN...

...1787 The removed phrase did not exist in C++11, so I believe it is fine to use poison for uninitialized char types. Juneyoung On Fri, Oct 9, 2020 at 12:19 PM Hubert Tong < hubert.reinterpretcast at gmail.com> wrote: > On Thu, Oct 8, 2020 at 11:09 PM Juneyoung Lee <juneyoung.lee at sf.snu.ac.kr> > wrote: > >> It is UB when a poison is passed to certain operations that raise UB on >> poison, such as division by poison/dereferencing poison pointer/branching >> on poison condition/etc. >> > Got it. Thanks. > > >> Otherwise, poison is simp...

I almost change all the instruction formats. It was a huge work. I am going to compile and run it now. Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh