Displaying 3 results from an estimated 3 matches for "smxe".
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sme
2013 Aug 23
2
[PATCH] Nested VMX: Allow to set CR4.OSXSAVE if guest has xsave feature
...X_CR4_FIXED1:
+ data = 0x267ff;
+ /* Allow to set OSXSAVE if guest has xsave feature. */
+ hvm_cpuid(0x1, &eax, &ebx, &ecx, &edx);
+ if ( ecx & cpufeat_mask(X86_FEATURE_XSAVE) )
+ data |= X86_CR4_OSXSAVE;
/* allow 0-settings except SMXE */
- data = 0x267ff & ~X86_CR4_SMXE;
+ data &= ~X86_CR4_SMXE;
break;
case MSR_IA32_VMX_MISC:
/* Do not support CR3-target feature now */
--
1.7.1
2013 Sep 23
11
[PATCH v4 0/4] x86/HVM: miscellaneous improvements
The first and third patches are cleaned up versions of an earlier v3
submission by Yang.
1: Nested VMX: check VMX capability before read VMX related MSRs
2: VMX: clean up capability checks
3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation
4: x86: make hvm_cpuid() tolerate NULL pointers
Signed-off-by: Jan Beulich <jbeulich@suse.com>
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com>
With virtual EPT support, L1 hyerpvisor can use EPT hardware
for L2 guest''s memory virtualization. In this way, L2 guest''s
performance can be improved sharply. According to our testing,
some benchmarks can show > 5x performance gain.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Zhang Xiantao (11):