search for: smulbb

...I../include -g -O2 -c nb_celp.c -MT nb_celp.lo -MD -MP -MF .deps/nb_celp.TPlo -fPIC -DPIC -o .libs/nb_celp.o /tmp/ccHf25Hb.s: Assembler messages: /tmp/ccHf25Hb.s:1573: Error: selected processor does not support `smulwb lr,r5,r3' /tmp/ccHf25Hb.s:2844: Error: selected processor does not support `smulbb r0,r1,r2' /tmp/ccHf25Hb.s:2871: Error: selected processor does not support `smulbb r2,r1,r3' /tmp/ccHf25Hb.s:2911: Error: selected processor does not support `smulbb r0,r1,r2' /tmp/ccHf25Hb.s:4386: Error: selected processor does not support `smulbb r3,r1,r2' /tmp/ccHf25Hb.s:4435: Er...

...5e-asm This gives below errors. gcc -DHAVE_CONFIG_H -I. -I. -I.. -I../include -I../include -I.. -g - O2 -fvisibility=hidden -MT cb_search.lo -MD -MP -MF .deps/ cb_search.Tpo -c cb_search.c -o cb_search.o /var/folders/a9/a95y5WFFGOafslDBRmx2hk+++TM/-Tmp-//ccBD8xFa.s:375:no such instruction: `smulbb %edx,%ax,%si' /var/folders/a9/a95y5WFFGOafslDBRmx2hk+++TM/-Tmp-//ccBD8xFa.s:522:no such instruction: `smlabb %eax,%dx,%esi,%ecx' /var/folders/a9/a95y5WFFGOafslDBRmx2hk+++TM/-Tmp-//ccBD8xFa.s:555:no such instruction: `smlabb %ecx,%ax,%eax,%edx' /var/folders/a9/a95y5WFFGOafslDBRmx2hk+...

...lt;open_loop_nbest_pitch+660>: mov r6, r3 0x4003032c <open_loop_nbest_pitch+664>: mov r7, #0 ; 0x0 0x40030330 <open_loop_nbest_pitch+668>: ldr lr, [r11, #-84] 0x40030334 <open_loop_nbest_pitch+672>: ldrh r3, [r7, lr] 0x40030338 <open_loop_nbest_pitch+676>: smulbb r3, r3, r3 0x4003033c <open_loop_nbest_pitch+680>: mov r3, r3, lsl #16 0x40030340 <open_loop_nbest_pitch+684>: mov r12, r3, lsr #16 0x40030344 <open_loop_nbest_pitch+688>: ldr r3, [r4, r10, lsl #2] 0x40030348 <open_loop_nbest_pitch+692>: smulbb r1, r12, r3 0x40...

Hi, I'm trying to get speex working on an ARM board (ARM926EJ-Sid(wb) core, ARM 5TE architecture) and getting segfaults if build with "--enable-fixed-point --enable-arm5e-asm" options. If I use just "--enable-fixed-point", then it runs fine, but once I add "--enable-arm5e-asm" it start crashing (I use testenc to test it). Further investigation showed, that it

...rch.c libtool: compile: gcc -DHAVE_CONFIG_H -I. -I.. -I../include -I.. -I/root/dump/include -g -O2 -fvisibility=hidden -MT cb_search.lo -MD -MP -MF .deps/cb_search.Tpo -c cb_search.c -fPIC -DPIC -o .libs/cb_search.o fixed_arm5e.h: Assembler messages: fixed_arm5e.h:41: Error: no such instruction: `smulbb %ecx,%ax,%di' fixed_arm5e.h:50: Error: no such instruction: `smlabb %edx,%si,%edi,%ecx' fixed_arm5e.h:50: Error: no such instruction: `smlabb %edi,%cx,%esi,%edx' fixed_arm5e.h:41: Error: no such instruction: `smulbb %ecx,%si,%dx' fixed_arm5e.h:50: Error: no such instruction: `smlabb...

Hi I want to port speex to my pocket PC iPAQ1945 which has a Samsung processor 2410, an ARM9-based processor. I would like to write the specific optimized code for this chip. I had some experience at DSP chip and fixed-point coding but know nothing about embedded system and ARM. Could someone tell me some hint how to write optimized code for this pocket PC. If you can give me some links that will

Hi, I have one question: Will Speex run in realtime (both encode / decode probably simulateusly) on Nokia 6600 --- basicaly ARM9 104MHz with Symbian 7s after porting to its C++ or Java? I am thinking mostly about the worst quality encoding (optionally duplex). Can this processor make it? Oh 6600 has something about 6mb memory if I remember good. Plase cc kangur@polcom.net in replies.

...ot;(a), "=r"(b) + : "0"(c), "1"(a), "2"(b) + ); + return c; +} + +/** 16x16 multiplication where the result fits in 32 bits */ +#undef MULT16_16 +static inline opus_val32 MULT16_16(opus_val16 a, opus_val16 b) +{ + int res; + __asm__( + "smulbb %0, %1, %2;\n" + : "=&r"(res) + : "r"(a), "r"(b) + ); + return res; +} + +#endif diff --git a/silk/SigProc_FIX.h b/silk/SigProc_FIX.h index cf1ab36..bccd73d 100644 --- a/silk/SigProc_FIX.h +++ b/silk/SigProc_FIX.h @@ -576,6 +576,10 @@ static in...

Hi James/Tim, I am trying to add a patterns for SMLALBB I think these two assembly patterns can be reduced to SMLALBB using tablegen. 1) smulbb r2, r3, r2 adds r0, r2, r0 (RdLo) asr r3, r2, #31 adc r1, r3, r1 (RdHi) ==> smlalbb r0, r1, r3, r2 I have added pattern in def SMLALBB : AMulxyI64< ..... as below :- [] modified to ---> [((set GPR:$RdLo, (ARMaddc (set GPR:$Rd, mul GPR:$Rn, GPR:$Rm), GPR:$Rd...

...ly about the worst > quality encoding (optionally duplex). Can this processor make it? Oh 6600 > has something about 6mb memory if I remember good. I'm not sure the current code will do it (maybe?), but I think it can be done. On question: does this ARM support instruction like smlabb, smulbb, smulwb, ... ? Jean-Marc -- Jean-Marc Valin, M.Sc.A., ing. jr. LABORIUS (http://www.gel.usherb.ca/laborius) Université de Sherbrooke, Québec, Canada -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size:...

...; wrote: > Hi, > > Assuming you have gcc, you can already compile with --enable-arm5e-asm > and get good results. Right now, many places use ARM4 assembly even on > ARM5E, so if you want even better results, you can rewrite those. The > main instructions you'll want to use are smulbb, smlabb, smulwb and > smlawb, which aren't present in ARM4 and are usually more efficient than > mul, smull and mla. > > Jean-Marc >

...quality encoding (optionally duplex). Can this processor make it? Oh 6600 > > has something about 6mb memory if I remember good. > > I'm not sure the current code will do it (maybe?), but I think it can be > done. On question: does this ARM support instruction like smlabb, > smulbb, smulwb, ... ? > > Jean-Marc --- >8 ---- List archives: http://www.xiph.org/archives/ Ogg project homepage: http://www.xiph.org/ogg/ To unsubscribe from this list, send a message to 'speex-dev-request@xiph.org' containing only the word 'unsubscribe' in the body. No subj...