search for: smpt_info

Displaying 11 results from an estimated 11 matches for "smpt_info".

2013 Sep 06
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...mdev->id, "SMPT entry", "SW DMA addr", "RefCount"); seq_puts(s, "====================================================\n"); if (mdev->smpt) { @@ -111,8 +111,8 @@ static int mic_smpt_show(struct seq_file *s, void *pos) spin_lock_irqsave(&smpt_info->smpt_lock, flags); for (i = 0; i < smpt_info->info.num_reg; i++) { seq_printf(s, "%9s|%-10d| %-#14llx %-10lld\n", - " ", i, smpt_info->entry[i].dma_addr, - smpt_info->entry[i].ref_count); + " ", i, smpt_info->entry[i].dma_addr, +...
2013 Jul 25
0
[PATCH 1/5] Intel MIC Host Driver for X100 family.
...%-10s %-10s\n", + mdev->id, "SMPT entry", "SW DMA addr", + "RefCount", "Register", "Snoop", "RegDMAAddr"); + seq_puts(s, "====================================================\n"); + + if (mdev->smpt) { + struct mic_smpt_info *smpt_info = mdev->smpt; + spin_lock_irqsave(&smpt_info->smpt_lock, flags); + for (i = 0; i < smpt_info->info.num_reg; i++) { + u32 val = mic_mmio_read(&mdev->mmio, + MIC_X100_SBOX_BASE_ADDRESS + + MIC_X100_SBOX_SMPT00 + (4 * i)); + seq_printf(s, "%9s|%-10d|...
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:
2013 Sep 05
0
[PATCH RESEND v3 3/7] Intel MIC Host Driver, card OS state management.
...ate; + unsigned long flags; + + seq_printf(s, "MIC %-2d |%-10s| %-14s %-10s\n", + mdev->id, "SMPT entry", "SW DMA addr", "RefCount"); + seq_puts(s, "====================================================\n"); + + if (mdev->smpt) { + struct mic_smpt_info *smpt_info = mdev->smpt; + spin_lock_irqsave(&smpt_info->smpt_lock, flags); + for (i = 0; i < smpt_info->info.num_reg; i++) { + seq_printf(s, "%9s|%-10d| %-#14llx %-10lld\n", + " ", i, smpt_info->entry[i].dma_addr, + smpt_info->entry[i].ref_count...