search for: smpt

Displaying 20 results from an estimated 44 matches for "smpt".

2009 Jul 28
6
how to set smpt server for our rails applicaion
hi i am using technoweenie-restful-authentication plug-in for authentication in my application. i want to send a activation link to the user''s mail-id. for that i need to set the smpt server for our rails application, for that i added the follwing code in config/environment.rb file ActionMailer::Base.delivery_method:smpt ActionMailer::Base.smpt_settings = { :address => "localhost", :port => 25, :authentication=> :login, :user_na...
2013 Jul 25
0
[PATCH 1/5] Intel MIC Host Driver for X100 family.
...c/host/mic_common.h | 37 ++ drivers/misc/mic/host/mic_debugfs.c | 366 ++++++++++++ drivers/misc/mic/host/mic_debugfs.h | 34 ++ drivers/misc/mic/host/mic_device.h | 280 +++++++++ drivers/misc/mic/host/mic_main.c | 1095 ++++++++++++++++++++++++++++++++++ drivers/misc/mic/host/mic_smpt.c | 441 ++++++++++++++ drivers/misc/mic/host/mic_smpt.h | 103 ++++ drivers/misc/mic/host/mic_sysfs.c | 360 +++++++++++ drivers/misc/mic/host/mic_x100.c | 665 +++++++++++++++++++++ drivers/misc/mic/host/mic_x100.h | 112 ++++ include/uapi/linux/Kbuild | 1 +...
2008 Sep 11
0
Using gmail smpt in production
I have an app that will be handling a lot of incoming e-mail. For dev purposes we''ve just been using gmail. This seems like a bad idea in production. Anyone using gmail in production that handles a fair amount of incoming email? thx --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "Ruby on Rails:
2006 Jul 11
1
smpt server
Hi, i am now in the process of building a newsletter system which will send out emails to users that have enlisted to a certain group; everything''s going fine, and i an towards the end of this project...now the real part of the story kicks in, where i need to check to see if the thing is working or not. i have been looking over the development.log file, and i see that the emails
2009 Sep 02
2
sendmail routing
...domain names. Actually we just treat the three domain names as aliases of the mail server (via the local-host-names file and I do not see a need to change this. What I would like to do is route (relay?) any outgoing emails that are from emails addresses using only one of those domains to a separate SMPT server. 1. Is this possible? 2. What is it called? 3. Can you provide examples or links to relevant docs? TIA Regards, Hugh -- Hugh E Cruickshank, Forward Software, www.forward-software.com
2007 Feb 01
3
imap pop3 servers
I'm doing a complete upgrade of a server which I was using uw-imap for the imap/pop4 daemons.(This was an old RH 7.2 system and has been upgraded to CentOS 4.4 64bit) I notice there isn't an rpm at any of the repositories for this. I do pop before smpt for the remote users I have and also use procmail for calling spamc from SpamAssassin. Is there some place I can get uw's imap or do I need to settle for using something like Dovecot? (Which doesn't support procmail AFAICT) Also I did do a search and read the wiki for CentOS and just ab...
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...g: a) Initializes the Intel MIC X100 PCIe devices. b) Provides sysfs entries for family and stepping information. Patch 2: This patch enables the following features in the "Intel MIC Host Driver" in the block diagram: a) MSIx, MSI and legacy interrupt support. b) System Memory Page Table(SMPT) support. SMPT enables system memory access from the card. On X100 devices the host can program 32 SMPT registers each capable of accessing 16GB of system memory address space from X100 devices. The registers can thereby be used to access a cumulative 512GB of system memory address spac...
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...g: a) Initializes the Intel MIC X100 PCIe devices. b) Provides sysfs entries for family and stepping information. Patch 2: This patch enables the following features in the "Intel MIC Host Driver" in the block diagram: a) MSIx, MSI and legacy interrupt support. b) System Memory Page Table(SMPT) support. SMPT enables system memory access from the card. On X100 devices the host can program 32 SMPT registers each capable of accessing 16GB of system memory address space from X100 devices. The registers can thereby be used to access a cumulative 512GB of system memory address spac...
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...g: a) Initializes the Intel MIC X100 PCIe devices. b) Provides sysfs entries for family and stepping information. Patch 2: This patch enables the following features in the "Intel MIC Host Driver" in the block diagram: a) MSIx, MSI and legacy interrupt support. b) System Memory Page Table(SMPT) support. SMPT enables system memory access from the card. On X100 devices the host can program 32 SMPT registers each capable of accessing 16GB of system memory address space from X100 devices. The registers can thereby be used to access a cumulative 512GB of system memory address spac...
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...g: a) Initializes the Intel MIC X100 PCIe devices. b) Provides sysfs entries for family and stepping information. Patch 2: This patch enables the following features in the "Intel MIC Host Driver" in the block diagram: a) MSIx, MSI and legacy interrupt support. b) System Memory Page Table(SMPT) support. SMPT enables system memory access from the card. On X100 devices the host can program 32 SMPT registers each capable of accessing 16GB of system memory address space from X100 devices. The registers can thereby be used to access a cumulative 512GB of system memory address spac...
2003 Apr 28
2
cascaded HTB urgent question
...build the following hierarchy: (qdisc htb 1:0) -> (class htb 1:1) -> (qdisc htb 2:0) -> (class htb 2:1) -> (class htb 2:2) I want to attache aggregate u32 filters at 1:0 for supernets, then at 2:0 (and 3:0, 4:0, etc), I attach the more specific u32 filters for say HTTP and SMPT shaping. so I attach the following filters: tc filter add dev eth0 parent 1:0 protocol ip u32 match ip dst 172.16.1.0/24 classid 1:1 so that all the class c traffic is directed to 1:1 then for that c class web traffic tc filter add dev eth0 parent 2:0 protocol ip u32 match ip sport 80 0xffff cla...
2007 Jan 22
5
LoadBalancing on many asimetric different dsl''s.
...ce results. But what in my situation? My questions are: how to set load balancing to get all links equally loaded and avoid situation when the up load will be full and download almost empty? I believe this situation can happen due to fact that load balancing is based on flows and for example p2p or smpt/pop3 will eat whole upload. If my problem isn''t clear I''ll try to explain it better later. Thanks in advance. Pozdrawiam sawar ---------------------------------------------------------------------- Wolne adresy pocztowe @interia.eu >>> http://link.interia.pl/f19e8
2010 Mar 11
1
Sendmail / Dovecot Config
...ory and a sub folder to hold any user created folders. This all seems to work as I can create folders, copy emails to them r-arrange the folders etc as I want via a mail client using imap on 143. My only problem is that I have also configured send mail as best as I know to listen on port 25 as an SMPT client but any emails sent to it to one of the email addresses are saved by sendmail to /var/spool/mail/username and not picked up by dovecot Thanks John
2013 Sep 04
0
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...C X100 PCIe devices. > b) Provides sysfs entries for family and stepping information. > > Patch 2: This patch enables the following features in the > "Intel MIC Host Driver" in the block diagram: > a) MSIx, MSI and legacy interrupt support. > b) System Memory Page Table(SMPT) support. SMPT enables system memory > access from the card. On X100 devices the host can program 32 SMPT > registers each capable of accessing 16GB of system memory > address space from X100 devices. The registers can thereby be used > to access a cumulative 512GB of system...
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...g: a) Initializes the Intel MIC X100 PCIe devices. b) Provides sysfs entries for family and stepping information. Patch 2: This patch enables the following features in the "Intel MIC Host Driver" in the block diagram: a) MSIx, MSI and legacy interrupt support. b) System Memory Page Table(SMPT) support. SMPT enables system memory access from the card. On X100 devices the host can program 32 SMPT registers each capable of accessing 16GB of system memory address space from X100 devices. The registers can thereby be used to access a cumulative 512GB of system memory address spac...
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...g: a) Initializes the Intel MIC X100 PCIe devices. b) Provides sysfs entries for family and stepping information. Patch 2: This patch enables the following features in the "Intel MIC Host Driver" in the block diagram: a) MSIx, MSI and legacy interrupt support. b) System Memory Page Table(SMPT) support. SMPT enables system memory access from the card. On X100 devices the host can program 32 SMPT registers each capable of accessing 16GB of system memory address space from X100 devices. The registers can thereby be used to access a cumulative 512GB of system memory address spac...
2013 Sep 06
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...rs/misc/mic/card/mic_virtio.c | 17 ++++--- drivers/misc/mic/card/mic_x100.c | 4 +- drivers/misc/mic/host/mic_debugfs.c | 91 ++++++++++++++++++------------------- drivers/misc/mic/host/mic_fops.c | 6 +-- drivers/misc/mic/host/mic_intr.c | 37 ++++++++------- drivers/misc/mic/host/mic_smpt.c | 17 +++---- drivers/misc/mic/host/mic_sysfs.c | 18 ++++---- drivers/misc/mic/host/mic_virtio.c | 34 ++++++-------- drivers/misc/mic/host/mic_x100.c | 29 ++++++------ 9 files changed, 122 insertions(+), 131 deletions(-) diff --git a/drivers/misc/mic/card/mic_virtio.c b/drivers/misc/...
2003 Jan 06
9
SMTP external forward
I read several posts about SMTP being blocked at ISP. My ISP has the same limitation. My ADSL connection (1 fixed IP) only permits outbound connection to port 25 to their server. None of those posts answered my need. I tried FAQ also. I have several internal email clients/bots that needs to retrieve/send messages, some of then are notebooks. It''s not fair to change SMTP server to the
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
...++++++ drivers/misc/mic/host/mic_debugfs.h | 34 + drivers/misc/mic/host/mic_device.h | 280 ++++++ drivers/misc/mic/host/mic_fops.c | 280 ++++++ drivers/misc/mic/host/mic_fops.h | 37 + drivers/misc/mic/host/mic_main.c | 1119 ++++++++++++++++++++++ drivers/misc/mic/host/mic_smpt.c | 441 +++++++++ drivers/misc/mic/host/mic_smpt.h | 103 ++ drivers/misc/mic/host/mic_sysfs.c | 360 +++++++ drivers/misc/mic/host/mic_virtio.c | 703 ++++++++++++++ drivers/misc/mic/host/mic_virtio.h | 108 +++ drivers/misc/mic/host/mic_x100.c | 665 +++++++++++++ driver...
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
...++++++ drivers/misc/mic/host/mic_debugfs.h | 34 + drivers/misc/mic/host/mic_device.h | 280 ++++++ drivers/misc/mic/host/mic_fops.c | 280 ++++++ drivers/misc/mic/host/mic_fops.h | 37 + drivers/misc/mic/host/mic_main.c | 1119 ++++++++++++++++++++++ drivers/misc/mic/host/mic_smpt.c | 441 +++++++++ drivers/misc/mic/host/mic_smpt.h | 103 ++ drivers/misc/mic/host/mic_sysfs.c | 360 +++++++ drivers/misc/mic/host/mic_virtio.c | 703 ++++++++++++++ drivers/misc/mic/host/mic_virtio.h | 108 +++ drivers/misc/mic/host/mic_x100.c | 665 +++++++++++++ driver...