Displaying 2 results from an estimated 2 matches for "smaller_type".
2016 Nov 28
4
[RFC] Supporting ARM's SVE in LLVM
On 28 November 2016 at 01:43, Paul Walker <Paul.Walker at arm.com> wrote:
> Reconsidering the above loops with this type system leads to IR like:
>
> (1) <n x 4 x i32> += zext <n x 4 x i8> as <n x 4 x i32> ; bigger_type=i32, smaller_type=i8
> (2) <n x 16 x i8> += <n x 16 x i8>
Hi Paul,
I'm with Mehdi on this... these examples don't look problematic. You
have shown what the different constructs would be good at, but I still
can't see where they won't be.
I originally though that the extended ver...
2016 Nov 27
5
[RFC] Supporting ARM's SVE in LLVM
On 27 November 2016 at 13:59, Paul Walker <Paul.Walker at arm.com> wrote:
> Thanks Renato, my takeaway is that I am presenting the design out of order. So let's focus purely on the vector length (VL) and ignore everything else. For SVE the vector length is unknown and can vary across an as yet undetermined boundary (process, library....). Within a boundary we propose making VL a