search for: sleduc

Displaying 3 results from an estimated 3 matches for "sleduc".

2020 Jan 14
2
Compiler position at Kalray
...mpiler engineer: https://www.kalrayinc.com/compiler-engineer/ The position is in Grenoble, France. Regards, Sebastien Sébastien Le Duc CoreSW Team Manager <http://www.kalray.eu/> kalray_logo Kalray S.A. <http://www.kalray.eu> www.kalray.eu Phone : 06 84 43 07 00 sleduc at kalray.eu Follow us <https://twitter.com/Kalrayinc> twitter_logo <http://www.linkedin.com/company/kalray> linkedin_logo 180 Avenue de l'Europe 38330 Montbonnot FRANCE <http://www.kalray.eu/news-7/news/latest> http://www.kalray.eu/IMG/gif/newsbanner.gif This message...
2020 Jan 03
2
Legalizing vector types
...s to make v8i16 legal, and handle the splitting to 2xv4i16 as patterns, which looks to me to be a lot of useless work Thanks in advance. Regards, Sebastien Sébastien Le Duc CoreSW Team Manager kalray_logo <http://www.kalray.eu/> Kalray S.A. www.kalray.eu Phone : 06 84 43 07 00 sleduc at kalray.eu Follow us twitter_logo <https://twitter.com/Kalrayinc> linkedin_logo <http://www.linkedin.com/company/kalray> 180 Avenue de l'Europe 38330 Montbonnot FRANCE <http://www.kalray.eu/news-7/news/latest> This message contains information that may be privileged or...
2020 Feb 07
2
LLVM Backend Legalize Phase
...d/store, should we continue using pseudo instruction for this considering that instead of expanding we need to load effective address from memory and perform load/store 64 bits register with the loaded effective address? Again, thank you for your help! Best, Miguel From: Sebastien Le Duc [mailto:sleduc at kalray.eu] Sent: February 06, 2020 4:27 PM To: Miguel Inigo J. Manalac Subject: RE: [llvm-dev] LLVM Backend Legalize Phase I think you can make the 32bit and 64bit types legal (using addRegisterClass) and use setOperationAction(Expand) for all the operations for which you don’t have native supp...