Displaying 15 results from an estimated 15 matches for "sirish".
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girish
2012 Apr 19
4
[LLVMdev] Target Dependent Hexagon Packetizer patch
Hi,
Here's a patch for Hexagon Packetizer for review. This patch does not
yield any warnings.
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
No test cases for a 500k patch?
-eric
On Apr 18, 2012, at 9:18 PM, Sirish Pande wrote:
> Hi,
>
> Here's a patch for Hexagon Packetizer for review. This patch does not yield any warnings.
>
> Sirish
>
> --
> Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
>
> <HexagonPacketizer.patch>__________________________...
2012 Apr 20
2
[LLVMdev] Hexagon Test cases.
Here's a patch that contains Hexagon Test cases. Please review.
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2017 May 19
4
memcmp code fragment
...phole optimization for squenece
of instructions that identifies
branch termiantor, compare, load, gep etc and converts them to a call to
memcmp. This small pass gave me improvement of 67% on SPEC2000 bzip2 on X86.
Is there a better idea, other than small peephole pass on IR to optimize
this code?
Sirish
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2012 Mar 05
1
[LLVMdev] printing hex format for floating point number
...999A for 9.1) for a corresponding
floating point number. The routine convertToHexString in APFFloat class
only prints in C99 Floating point hexagondecimal constant (eg 1.e00000p3).
Without writing my own routine, how do I get to print the hexadecimal
representation for a floating point value?
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2012 Apr 19
1
[LLVMdev] Hexagon Patch for
Hi,
Here's a Hexagon patch for replacing transfer/copy instructions to
combine for review. This patch does not yield any warnings on Hexagon,
Arm and X86 build on Linux.
This work is by Arnold Schwaighofer.
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2012 Apr 20
0
[LLVMdev] Hexagon Test cases.
On Apr 20, 2012, at 1:58 PM, Sirish Pande <spande at codeaurora.org> wrote:
> Here's a patch that contains Hexagon Test cases. Please review.
You can't include these in the patches that they're supposed to go along with?
-eric
2012 Apr 20
1
[LLVMdev] Hexagon Test cases.
Sure I can do that. In that case, let me recreate all the patches (along
with the test cases) and put up the patches for review.
sirish
On 4/20/2012 4:16 PM, Eric Christopher wrote:
> On Apr 20, 2012, at 1:58 PM, Sirish Pande<spande at codeaurora.org> wrote:
>
>> Here's a patch that contains Hexagon Test cases. Please review.
> You can't include these in the patches that they're supposed to go alo...
2017 May 24
2
memcmp code fragment
...it's common
> and matters a lot, awesome.
> I wouldn't do it just to fix SPEC :P
>
> (people who care about bzip2 speed probably use any of the faster bzip2
> impls :P)
>
Danny, do you know of forks of bzip2 that are more efficient than bzip.org?
I haven't seen one.
Sirish is going to send a patch to Julian Seward and try to get the change
in a new release of bzip2, and from there we may need to ask the AOSP
folks to update bzip2. AOSP has the last released bzip2 from Sept 2010.
For SPEC benchmarketing, doing the right thing wouldn't help.
Maybe we should put t...
2012 Jul 10
1
[LLVMdev] floating point: seto opcode
...n the following in ISDOpcodes.h
SETO, // 0 1 1 1 True if ordered (no nans)
SETUO, // 1 0 0 0 True if unordered: isnan(X) |
isnan(Y)
Is it safe to assume that SETO is not of SETUO? We have support for setuo
in the architecture but not seto.
Sirish
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2012 Apr 19
0
[LLVMdev] Patch for Hexagon Architectural feature, New value jump.
Here's a Hexagon patch for Hexagon New Value Jump instructions for
review. This patch does not yield any warnings on Hexagon, Arm and X86
build on Linux.
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2012 Apr 19
0
[LLVMdev] Hexagon cfe patch for V5- floating point support.
Here's a Hexagon cfe patch for floating point support. Please take some
time to review this patch. This patch does not yield any warnings on
Hexagon, Arm and X86 build on Linux.
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2012 Apr 19
0
[LLVMdev] Hexagon llvm patch for V5- floating point support.
Here's a Hexagon llvm patch for floating point support. Please take some
time to review this patch. This patch does not yield any warnings on
Hexagon, Arm and X86 build on Linux.
Sirish
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
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2012 Jun 08
1
[LLVMdev] Predicate registers/condition codes question
On Mon, 4 Jun 2012 11:41:43 -0500
Sebastian Pop <spop at codeaurora.org> wrote:
> On Mon, Jun 4, 2012 at 11:22 AM, Sebastian Pop <spop at codeaurora.org>
> wrote:
> >> Why don't you call it with "Promote" instead of
> >> "Custom" and let the Legalizer do the job? Does it not work?
> >
> > I tried this, and the legalizer will
2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
Sure I will split it and put it in two patches.
Give me few hours. I need to test those patches.
Sirish
On 4/19/2012 8:40 AM, Tom Stellard wrote:
> On Wed, Apr 18, 2012 at 11:18:05PM -0500, Sirish Pande wrote:
>> Hi,
>>
>> Here's a patch for Hexagon Packetizer for review. This patch does
>> not yield any warnings.
>>
> Would it be possible to split this patch...