Displaying 14 results from an estimated 14 matches for "silk_rshift_round".
2017 Apr 26
2
2 patches related to silk_biquad_alt() optimization
...silk_assert( ( stride == 1 ) || ( stride == 2 ) );
if( stride == 1) {
opus_int32 out32_Q14;
for( k = 0; k < len; k++ ) {
/* S[ 0 ], S[ 1 ]: Q12 */
out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[ 0 ], B_Q28[ 0 ], in[ k
] ), 2 );
S[ 0 ] = S[ 1 ] + silk_RSHIFT_ROUND( (opus_int64)out32_Q14 *
(-A_Q28[ 0 ]), 30 );
S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], in[ k ] );
S[ 1 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14 * (-A_Q28[ 1
]) , 30 );
S[ 1 ] = silk_SMLAWB( S[ 1 ], B_Q28[ 2 ], in[ k ] );
/* Scale back to Q0 and...
2017 May 15
2
2 patches related to silk_biquad_alt() optimization
...stride == 1) {
> opus_int32 out32_Q14;
> for( k = 0; k < len; k++ ) {
> /* S[ 0 ], S[ 1 ]: Q12 */
> out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[ 0 ], B_Q28[ 0
> ], in[ k ] ), 2 );
>
> S[ 0 ] = S[ 1 ] + silk_RSHIFT_ROUND(
> (opus_int64)out32_Q14 * (-A_Q28[ 0 ]), 30 );
> S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], in[ k ] );
>
> S[ 1 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14 *
> (-A_Q28[ 1 ]) , 30 );
> S[ 1 ] = silk_SMLAWB( S[ 1 ], B_Q28[ 2...
2017 May 08
0
2 patches related to silk_biquad_alt() optimization
...2 ) );
>
> if( stride == 1) {
> opus_int32 out32_Q14;
> for( k = 0; k < len; k++ ) {
> /* S[ 0 ], S[ 1 ]: Q12 */
> out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[ 0 ], B_Q28[ 0 ], in[
> k ] ), 2 );
>
> S[ 0 ] = S[ 1 ] + silk_RSHIFT_ROUND( (opus_int64)out32_Q14 *
> (-A_Q28[ 0 ]), 30 );
> S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], in[ k ] );
>
> S[ 1 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14 * (-A_Q28[
> 1 ]) , 30 );
> S[ 1 ] = silk_SMLAWB( S[ 1 ], B_Q28[ 2 ], in[ k ] );
>
&g...
2017 May 17
0
2 patches related to silk_biquad_alt() optimization
...opus_int32 out32_Q14;
> > for( k = 0; k < len; k++ ) {
> > /* S[ 0 ], S[ 1 ]: Q12 */
> > out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[ 0 ], B_Q28[ 0
> > ], in[ k ] ), 2 );
> >
> > S[ 0 ] = S[ 1 ] + silk_RSHIFT_ROUND(
> > (opus_int64)out32_Q14 * (-A_Q28[ 0 ]), 30 );
> > S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], in[ k ] );
> >
> > S[ 1 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14 *
> > (-A_Q28[ 1 ]) , 30 );
> > S[ 1 ] = s...
2017 Apr 25
2
2 patches related to silk_biquad_alt() optimization
...A_Q28[ 0 ] ) & 0x00003FFF; /* lower part */
A0_U_Q28 = silk_RSHIFT( -A_Q28[ 0 ], 14 ); /* upper part */
A1_L_Q28 = ( -A_Q28[ 1 ] ) & 0x00003FFF; /* lower part */
A1_U_Q28 = silk_RSHIFT( -A_Q28[ 1 ], 14 ); /* upper part */
...
S[ 0 ] = S[1] + silk_RSHIFT_ROUND( silk_SMULWB( out32_Q14, A0_L_Q28
), 14 );
S[ 0 ] = silk_SMLAWB( S[ 0 ], out32_Q14, A0_U_Q28 );
S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], inval);
S[ 1 ] = silk_RSHIFT_ROUND( silk_SMULWB( out32_Q14, A1_L_Q28 ), 14
);
S[ 1 ] = silk_SMLAWB( S[ 1 ], out32_Q14, A1_U_Q28...
2015 Aug 04
0
[PATCH] Create OPUS_FAST_INT64 macro, to abstract conditions where opus_int64 should be used.
...))))
/* (a32 * b32) >> 16 */
-#if defined(__x86_64__) || defined(__LP64__) || defined(_WIN64)
+#if OPUS_FAST_INT64
#define silk_SMULWW(a32, b32) (((opus_int64)(a32) * (b32)) >> 16)
#else
#define silk_SMULWW(a32, b32) silk_MLA(silk_SMULWB((a32), (b32)), (a32), silk_RSHIFT_ROUND((b32), 16))
#endif
/* a32 + ((b32 * c32) >> 16) */
-#if defined(__x86_64__) || defined(__LP64__) || defined(_WIN64)
+#if OPUS_FAST_INT64
#define silk_SMLAWW(a32, b32, c32) ((a32) + (((opus_int64)(b32) * (c32)) >> 16))
#else
#define silk_SMLAWW(a32, b32, c32) silk_MLA(...
2015 Nov 16
0
[Fast Int64 3/4] Explicitly cast results of silk OPUS_FAST_INT64 macros back to opus_int32.
...6 */
#if OPUS_FAST_INT64
-#define silk_SMULWW(a32, b32) (((opus_int64)(a32) * (b32)) >> 16)
+#define silk_SMULWW(a32, b32) ((opus_int32)(((opus_int64)(a32) * (b32)) >> 16))
#else
#define silk_SMULWW(a32, b32) silk_MLA(silk_SMULWB((a32), (b32)), (a32), silk_RSHIFT_ROUND((b32), 16))
#endif
/* a32 + ((b32 * c32) >> 16) */
#if OPUS_FAST_INT64
-#define silk_SMLAWW(a32, b32, c32) ((a32) + (((opus_int64)(b32) * (c32)) >> 16))
+#define silk_SMLAWW(a32, b32, c32) ((opus_int32)((a32) + (((opus_int64)(b32) * (c32)) >> 16)))
#else
#define...
2015 Nov 16
3
[Fast Int64 1/4] Move OPUS_FAST_INT64 definition to celt/arch.h.
---
celt/arch.h | 5 +++++
silk/macros.h | 4 +---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/celt/arch.h b/celt/arch.h
index 9f74ddd..670527b 100644
--- a/celt/arch.h
+++ b/celt/arch.h
@@ -78,6 +78,11 @@ static OPUS_INLINE void _celt_fatal(const char *str, const char *file, int line)
#define UADD32(a,b) ((a)+(b))
#define USUB32(a,b) ((a)-(b))
+/* Set this if opus_int64
2017 Apr 25
2
2 patches related to silk_biquad_alt() optimization
Hi Jean-Marc,
Tested on my chromebook, when stride (channel) == 1, the optimization has
no gain compared with C function.
When stride (channel) == 2, the optimization is 1.2%-1.8% faster (1.6% at
Complexity 8) compared with C function.
Please let me know and I can remove the optimization of stride 1 case.
If it's allowed to skip the split of A_Q28 and replace by 32-bit
multiplication
2016 Aug 23
0
[PATCH 8/8] Optimize silk_NSQ_del_dec() for ARM NEON
...psDelDec, i - decisionDelay, last_smple_idx, Winner_ind, gain_lo_s32x2, gain_hi_s32x2, shift_s32x4, t0_s32x4, t1_s32x4, pulses, pxq, NSQ );
+ }
+ for( ; ( i < decisionDelay ) && ( last_smple_idx >= 0 ); i++, last_smple_idx-- ) {
+ pulses[ i - decisionDelay ] = (opus_int8)silk_RSHIFT_ROUND( psDelDec->Q_Q10[ last_smple_idx ][ Winner_ind ], 10 );
+ pxq[ i - decisionDelay ] = (opus_int16)silk_SAT16( silk_RSHIFT_ROUND( silk_SMULWW( psDelDec->Xq_Q14[ last_smple_idx ][ Winner_ind ], gain ), shift ) );
+ NSQ->sLTP_shp_Q14[ NSQ->sLTP_shp_buf_idx - decisionDelay + i...
2016 Aug 23
2
[PATCH 7/8] Update NSQ_LPC_BUF_LENGTH macro.
NSQ_LPC_BUF_LENGTH is independent of DECISION_DELAY.
---
silk/define.h | 4 ----
1 file changed, 4 deletions(-)
diff --git a/silk/define.h b/silk/define.h
index 781cfdc..1286048 100644
--- a/silk/define.h
+++ b/silk/define.h
@@ -173,11 +173,7 @@ extern "C"
#define MAX_MATRIX_SIZE MAX_LPC_ORDER /* Max of LPC Order and LTP order */
-#if( MAX_LPC_ORDER >
2013 May 17
1
[Patch]01-Add ARM5E macros
...t;(c), "r"(a)
+ );
+ return res;
+}
+
+/* a64 + (b32 * c32) */
+#define silk_SMLAL(a64, b32, c32) (silk_ADD64((a64), ((opus_int64)(b32) * (opus_int64)(c32))))
+
+/* (a32 * b32) >> 16 */
+#define silk_SMULWW(a32, b32) silk_MLA(silk_SMULWB((a32), (b32)), (a32), silk_RSHIFT_ROUND((b32), 16))
+
+/* a32 + ((b32 * c32) >> 16) */
+#define silk_SMLAWW(a32, b32, c32) silk_MLA(silk_SMLAWB((a32), (b32), (c32)), (b32), silk_RSHIFT_ROUND((c32), 16))
+
+/* add/subtract with output saturated */
+static inline opus_int32 silk_ADD_SAT32(opus_int32 a, opus_int32 b)
+{
+ int r...
2016 Nov 03
0
Silk CNG
...all input voice silent. I have applied the recent bugfix 2349213003, but that didn't help.
I tried windows and android build, both ends keep quiet even both builds happily seems to generate silence there.
There is a line: frame[ i ] = (opus_int16)silk_ADD_SAT16( frame[ i ], silk_SAT16( silk_RSHIFT_ROUND( silk_SMULWW( CNG_sig_Q14[ MAX_LPC_ORDER + i ], gain_Q10 ), 8 ) ) );
When I mute both ends, the frame[i] is 0 before and after that line.
Opus 1.1.3 used with PJSip 2.5.5. Windows 7 desktop, Android 5 phone
Any help what is the trick to get Comfort Noise to be generated?
Thx,
Markus
2015 Nov 21
8
[Aarch64 v2 10/18] Clean up some intrinsics-related wording in configure.
---
configure.ac | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure.ac b/configure.ac
index f52d2c2..e1a6e9b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -190,7 +190,7 @@ AC_ARG_ENABLE([rtcd],
[enable_rtcd=yes])
AC_ARG_ENABLE([intrinsics],
- [AS_HELP_STRING([--disable-intrinsics], [Disable intrinsics optimizations for ARM(float) X86(fixed)])],,
+