Displaying 2 results from an estimated 2 matches for "silbar01".
2013 Mar 25
2
[LLVMdev] About the partial update clearence / dependency breaking mechanism
Hello,
I am currently looking into the advantages of using the
partial update clearance / dependency breaking mechanism
for some ARM cores.
It seems that the ARM specific code for this will always
return a clearance of 0 for VLD1LNd32 because of the following
code in getPartialRegUpdateClearance:
> if (UseOp != -1 && MI->getOperand(UseOp).readsReg())
> return 0;
so
2013 Mar 25
0
[LLVMdev] About the partial update clearence / dependency breaking mechanism
On Mar 25, 2013, at 5:02 AM, Silviu Baranga <silbar01 at arm.com> wrote:
> Hello,
>
> I am currently looking into the advantages of using the
> partial update clearance / dependency breaking mechanism
> for some ARM cores.
>
> It seems that the ARM specific code for this will always
> return a clearance of 0 for VLD1LNd32...