Displaying 3 results from an estimated 3 matches for "sigshift".
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sig_shift
2013 May 21
0
[PATCH] 02-
...4;\n"
+ "beq .celt_fir1_process16_done_%=;\n"
+
+ ".celt_fir1_process16_%=:\n"
+ /* Load 16 x values in q0, q1 lanes */
+ "vld1.16 {q0-q1}, [%0]!;\n"
+
+ /* Init four 32 bits sum in q7, q8, q9, q10 lanes */
+ "vshll.s16 q7, d0, %[SIGSHIFT];\n"
+ "vshll.s16 q8, d1, %[SIGSHIFT];\n"
+ "vshll.s16 q9, d2, %[SIGSHIFT];\n"
+ "vshll.s16 q10, d3, %[SIGSHIFT];\n"
+
+ /* Make previous samples vector for MAC in q5, q6 lanes */
+ "vext.16 q5, q5, q0, #7;\n"
+ "vext.1...
2013 May 21
2
[PATCH] 02-Add CELT filter optimizations
...4;\n"
+ "beq .celt_fir1_process16_done_%=;\n"
+
+ ".celt_fir1_process16_%=:\n"
+ /* Load 16 x values in q0, q1 lanes */
+ "vld1.16 {q0-q1}, [%0]!;\n"
+
+ /* Init four 32 bits sum in q7, q8, q9, q10 lanes */
+ "vshll.s16 q7, d0, %[SIGSHIFT];\n"
+ "vshll.s16 q8, d1, %[SIGSHIFT];\n"
+ "vshll.s16 q9, d2, %[SIGSHIFT];\n"
+ "vshll.s16 q10, d3, %[SIGSHIFT];\n"
+
+ /* Make previous samples vector for MAC in q5, q6 lanes */
+ "vext.16 q5, q5, q0, #7;\n"
+ "vext.1...
2013 May 21
0
regarding ARM NEON CELT filter optimizations
...4;\n"
+ "beq .celt_fir1_process16_done_%=;\n"
+
+ ".celt_fir1_process16_%=:\n"
+ /* Load 16 x values in q0, q1 lanes */
+ "vld1.16 {q0-q1}, [%0]!;\n"
+
+ /* Init four 32 bits sum in q7, q8, q9, q10 lanes */
+ "vshll.s16 q7, d0, %[SIGSHIFT];\n"
+ "vshll.s16 q8, d1, %[SIGSHIFT];\n"
+ "vshll.s16 q9, d2, %[SIGSHIFT];\n"
+ "vshll.s16 q10, d3, %[SIGSHIFT];\n"
I think C++-style comments should be avoided (or not mixed with C-style)
I'd prefer if named arguments (such as SIGSHIFT) coul...