search for: sign_bits

...ssible to be more generic? > sext_from type where type can be any type? The value of the > attribute would somehow tells us the type before extension? Why not the values codegen is actually looking for? Say, these attributes: known_bits(mask, bits) ; Partially known values. sign_bits(num) ; Number of leading sign extended bits. Example: ; unsigned char f(bool, signed char) define i32 known_bits(0xFFFFFF00, 0) @f(i32 known_bits(0xFFFFFFFE, 0) %b, i32 sign_bits(25) %c) If the attribute values were encoded as constants, these could e...

On May 29, 2008, at 10:30 AM, Alireza.Moshtaghi at microchip.com wrote: > > > 4) There will be 4 new function attributes: > sign_ext_from_i8, sign_ext_from_i16 > zero_ext_from_i8, zero_ext_from_i16 > These attributes will be placed on the function CALL node by > front-end > to inform the backend about such promotions and enable optimization > of > return

...>> sext_from type where type can be any type? The value of the >> attribute would somehow tells us the type before extension? > > Why not the values codegen is actually looking for? Say, these > attributes: > > known_bits(mask, bits) ; Partially known values. > sign_bits(num) ; Number of leading sign extended bits. Yes, this would be much nicer. The only issue is that attributes are currently a bitfield, so they can't be parameterized. I'd love to see this get fixed. Another issue with attributes is that they can't be applied to multipl...

-----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Eli Friedman Sent: Wednesday, September 10, 2008 3:30 PM To: LLVM Developers Mailing List Subject: Re: [LLVMdev] Custom Lowering and fneg On Wed, Sep 10, 2008 at 2:35 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote: > Generating the following LLVM IR: > > define

On Wed, Sep 10, 2008 at 2:35 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote: > Generating the following LLVM IR: > > define void @test_unary_op_anegate(float %x, float addrspace(11)* %result) > nounwind { > entry: > %neg = sub float -0.000000e+000, %x ; <float> [#uses=1] > store float %neg, float addrspace(11)* %result >

So, I have this small test program that I figured would cause no problems but want to test all the various data types and operations with my modified sparc backend. I've been working on LLVM for about 3 days now, so this might be a problem with not knowing enough yet, so thanks for bearing with me. The code that I based my example off of is compiled to LLVM-IR from: void

Eli, I've been working on this for a few days and still haven't gotten this towork. I've attached my dags that you asked for, and even there it is turning the floating point instruction into an integer return value. IR code just for reference: -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Villmow, Micah Sent: