Displaying 3 results from an estimated 3 matches for "si64".
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2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...MVT::ppcf128)),
- Hi,
- DAG.getCondCode(ISD::SETLT)),
- Lo, Hi);
- }
- break;
- }
- if (VT == MVT::ppcf128 && SrcVT == MVT::i64 && !isSigned) {
- // si64->ppcf128 done by libcall, below
- static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
- ExpandOp(DAG.getNode(ISD::SINT_TO_FP, dl, MVT::ppcf128,
- Node->getOperand(0)), Lo, Hi);
- Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
- // x>=0 ? (ppc...