Displaying 1 result from an estimated 1 matches for "shyenigma".
2018 Nov 01
2
RFC: System (cache, etc.) model for LLVM
...lag to the
processor? Is it only available while JITing?
> Here we see one of the flaws in the model. Because of the way
> ``Socket``, ``Module`` and ``Thread`` are defined above, we're forced
> to include a ``Module`` level even though it really doesn't make sense
> for our ShyEnigma processor. A ``Core`` has two ``Thread`` resources,
> a ``Module`` has one ``Core`` resource and a ``Socket`` has eight
> ``Module`` resources. In reality, a ShyEnigma core has two threads
> and a ShyEnigma socket has eight cores. At least for this SKU (more
> on that below).
Is thi...