Displaying 3 results from an estimated 3 matches for "shlx".
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2015 Jan 23
2
[LLVMdev] X86TargetLowering::LowerToBT
I suspect that this is because the mask in your example is the result of a variable shift, which (a) has it’s own performance and flags hazards pre-SHLX and (b) requires additional µops to do with TEST. I expect that ICC is putting a dummy TEST or XOR ahead of the BT to break the false flags dependency, as well.
If the mask were constant, I expect ICC would generate TEST instead (but I don’t have it handy to check).
– Steve
> On Jan 23, 2015...
2015 Jan 22
2
[LLVMdev] X86TargetLowering::LowerToBT
On Thu Jan 22 2015 at 3:32:53 PM Chris Sears <chris.sears at gmail.com> wrote:
> The status quo is:
>
> a) 40b REX+BT instruction for the 64b case
> b) 48b TEST for the 32b case
> c) unless it's small TEST
>
>
> You are currently paying a 16b penalty for TEST vs BT in the 32b case.
> That may be worth testing the -Os flag.
>
You'll want -Oz here, Os
2019 Mar 21
3
Nouveau dmem NULL Pointer deref (SVM)
...f 83 00 04 00 00 e9 17 ff ff ff 41 54 55 53 48 89 fb <8b> 47 28
85 c0 0f 84 cf 00 00 00 48 8b bb c0 01 00 00 31 f6 4c 8b
All code
========
0: 89 d9 mov %ebx,%ecx
2: 48 c7 c6 50 04 e5 c0 mov $0xffffffffc0e50450,%rsi
9: c4 42 79 f7 c0 shlx %eax,%r8d,%r8d
e: bd f0 ff ff ff mov $0xfffffff0,%ebp
13: e8 42 d5 7a c6 callq 0xffffffffc67ad55a
18: ff 83 00 04 00 00 incl 0x400(%rbx)
1e: e9 17 ff ff ff jmpq 0xffffffffffffff3a
23: 41 54 push %r12...