Displaying 2 results from an estimated 2 matches for "shlnsw".
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hlsw
2015 Jul 23
0
[LLVMdev] some superoptimizer results
...s intuition to
multiple-instruction result sequences?
%0:i32 = var
%1:i32 = addnw 1:i32, %0
%2:i32 = shl 1:i32, %1
infer %2
%3:i32 = shl 2:i32, %0
result %3
%0:i8 = var
%1:i1 = ult 191:i8, %0
%2:i1 = slt 255:i8, %0
%3:i1 = or %1, %2
infer %3
%4:i1 = sle 192:i8, %0
result %4
%0:i32 = var
%1:i32 = shlnsw %0, 1:i32
%2:i32 = or 1:i32, %1
%3:i1 = slt %1, %2
infer %3
result 1:i1
"or" and "and" are basically interchangeable as far as cost is concerned,
so this one also seems like a "subset":
%0:i32 = var
%1:i32 = addnsw 4294967295:i32, %0
%2:i32 = var
%3:i32 = or 1:i32, %...
2015 Jul 23
3
[LLVMdev] some superoptimizer results
> Interesting. Do you happen to have some examples laying around?
Sorry, no, I'll have to re-run. I felt that the select-heavy results were
sort of humorous and clever at first, but then just annoying.
> Except for decode-limited situations, in general decreasing the critical path length is more important
> than eliminating instructions. The critical path length is a