Displaying 3 results from an estimated 3 matches for "sfeq_ri".
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jeq_ri
2016 Feb 19
3
Failure to match a DAG after a minor pattern change in a custom Target
In an attempt to add vector registers to my target, I ran into a problem.
LLVM started to complain about not being able to infer types from the
provided DAG patterns for several classes of instructions. After a
discussion on the llvm-dev mailing list and IRC channel the recommendation
was to make DAG patterns for these classes of instructions more specific.
Which is what was done. However after
2016 Jan 29
2
New register class and patterns
I've added a new register class to my target, but haven't used any of the
new registers in any of the instructions. However when I compile llvm I get
the following error:
In SFEQ_ri: Could not infer all types in pattern
Curiously all the instructions where this error occurs are the set flag
instructions (flags like zero, less than, greater than etc).
Would anyone be able to figure out why this is happening? I can provide
more code if needed.
--
Rail Shafigulin
Software Eng...
2016 Feb 05
3
New register class and patterns
>
> No, this would have to be a void side effecting instruction which is a bit
> different.
What do you mean by "void side effecting instruction"? I'm not sure I
fully understand what you mean.
The flag register is an implicit register added to the selected
> MachineInstr's operands.
Is this something that is always done by LLVM? Is it me who is telling to
LLVM