search for: sev_es_cpuid_cache_initialized

...ry { > + unsigned long eax; > + unsigned long ebx; > + unsigned long ecx; > + unsigned long edx; Why are these unsigned longs? CPUID returns 32-bit values, this wastes 16 bytes per entry. > +}; > + > +static struct xarray sev_es_cpuid_cache; > +static bool __ro_after_init sev_es_cpuid_cache_initialized; > + > /* For early boot hypervisor communication in SEV-ES enabled guests */ > static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); > > @@ -463,6 +474,9 @@ void __init sev_es_init_vc_handling(void) > sev_es_setup_vc_stack(cpu); > } > > + xa_...

...ry { > + unsigned long eax; > + unsigned long ebx; > + unsigned long ecx; > + unsigned long edx; Why are these unsigned longs? CPUID returns 32-bit values, this wastes 16 bytes per entry. > +}; > + > +static struct xarray sev_es_cpuid_cache; > +static bool __ro_after_init sev_es_cpuid_cache_initialized; > + > /* For early boot hypervisor communication in SEV-ES enabled guests */ > static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); > > @@ -463,6 +474,9 @@ void __init sev_es_init_vc_handling(void) > sev_es_setup_vc_stack(cpu); > } > > + xa_...

...gt; #include <asm/cpu_entry_area.h> @@ -33,6 +34,16 @@ #define DR7_RESET_VALUE 0x400 +struct sev_es_cpuid_cache_entry { + unsigned long eax; + unsigned long ebx; + unsigned long ecx; + unsigned long edx; +}; + +static struct xarray sev_es_cpuid_cache; +static bool __ro_after_init sev_es_cpuid_cache_initialized; + /* For early boot hypervisor communication in SEV-ES enabled guests */ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); @@ -463,6 +474,9 @@ void __init sev_es_init_vc_handling(void) sev_es_setup_vc_stack(cpu); } + xa_init_flags(&sev_es_cpuid_cache, XA_FLAGS_...

...{ } +#endif + static void __init sev_es_alloc_runtime_data(int cpu) { struct sev_es_runtime_data *data; @@ -540,6 +596,8 @@ void __init sev_es_init_vc_handling(void) sev_es_setup_vc_stack(cpu); } + sev_es_setup_play_dead(); + xa_init_flags(&sev_es_cpuid_cache, XA_FLAGS_LOCK_IRQ); sev_es_cpuid_cache_initialized = true; -- 2.17.1

..._mmio(struct ghcb *ghcb, >> return ret; >> } >> >> +static unsigned long sev_es_get_cpuid_cache_index(struct es_em_ctxt *ctxt) >> +{ >> + unsigned long hi, lo; >> + >> + /* Don't attempt to cache until the xarray is initialized */ >> + if (!sev_es_cpuid_cache_initialized) >> + return ULONG_MAX; >> + >> + lo = lower_32_bits(ctxt->regs->ax); >> + >> + /* >> + * CPUID 0x0000000d requires both RCX and XCR0, so it can't be >> + * cached. >> + */ >> + if (lo == 0x0000000d) >> + return ULONG_MAX; &...

Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by

Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by