search for: setug

Hi All, I noticed LLVM target independent side is converting an ordered less than "setolt" into unordered greater than "setuge" operation. There are no target hooks to control going from the ordered mode into unordered. I am trying to figure out the best way to support unordered operation on Hexagon. We don't have a single instruction to do unordered operation. So we will have to break it down into 2 instruction...

...(LUi (HI16 imm:$in))>; Here are some which have several instructions multiclass SetgePats<RegisterClass RC, Instruction SLTOp, Instruction SLTuOp> { def : MipsPat<(setge RC:$lhs, RC:$rhs), (XORi (SLTOp RC:$lhs, RC:$rhs), 1)>; def : MipsPat<(setuge RC:$lhs, RC:$rhs), (XORi (SLTuOp RC:$lhs, RC:$rhs), 1)>; } On 07/20/2012 07:20 AM, Geraint Yang wrote: > Thanks for your reply. > > We are trying to implement a simple Mips-based CPU with just for > teaching purpose, so we delete some instructions which are not...

...case ISD::SETOLE: case ISD::SETLE: CondCode = XXXCC::COND_LE; break; case ISD::SETONE: case ISD::SETNE: CondCode = XXXCC::COND_NE; break; case ISD::SETUO: CondCode = XXXCC::COND_UN; break; case ISD::SETO: case ISD::SETUEQ: case ISD::SETUGT: case ISD::SETUGE: case ISD::SETULT: case ISD::SETULE: case ISD::SETUNE: CC = getSetCCInverse(CC,false); getFPCCtoMBCC(CC,CondCode); break; } } I am generating wrong code when using floating point library call for comparions. For the following simple case: flo...

Thanks for your reply. We are trying to implement a simple Mips-based CPU with just for teaching purpose, so we delete some instructions which are not commonly used, thus the task won't be too hard for students. I am responsible for modifying the compiler so that the compiler won't emit unsupported instructions. In order to avoid "can not select" error, I am trying to expand

...e = XXXCC::COND_LE; > break; > case ISD::SETONE: > case ISD::SETNE: > CondCode = XXXCC::COND_NE; > break; > case ISD::SETUO: > CondCode = XXXCC::COND_UN; > break; > case ISD::SETO: > case ISD::SETUEQ: > case ISD::SETUGT: > case ISD::SETUGE: > case ISD::SETULT: > case ISD::SETULE: > case ISD::SETUNE: > CC = getSetCCInverse(CC,false); > getFPCCtoMBCC(CC,CondCode); > break; > } > } > > I am generating wrong code when using floating point library c...

On Tue, Jul 9, 2013 at 3:00 PM, <sundeepk at codeaurora.org> wrote: > Hi All, > > I noticed LLVM target independent side is converting an ordered less than > "setolt" into unordered greater than "setuge" operation. There are no > target hooks to control going from the ordered mode into unordered. > > I am trying to figure out the best way to support unordered operation on > Hexagon. We don't have a single instruction to do unordered operation. So > we will have to break it...

...gt; CondCode = XXXCC::COND_NE; >> break; >> case ISD::SETUO: >> CondCode = XXXCC::COND_UN; >> break; >> case ISD::SETO: >> case ISD::SETUEQ: >> case ISD::SETUGT: >> case ISD::SETUGE: >> case ISD::SETULT: >> case ISD::SETULE: >> case ISD::SETUNE: >> CC = getSetCCInverse(CC,false); >> getFPCCtoMBCC(CC,CondCode); >> break; >&...

On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more

On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant

...end - // is cheaper on many machines (an AND instead of two shifts), so prefer - // it. - switch (cast<CondCodeSDNode>(CC)->get()) { - default: assert(0 && "Unknown integer comparison!"); - case ISD::SETEQ: - case ISD::SETNE: - case ISD::SETUGE: - case ISD::SETUGT: - case ISD::SETULE: - case ISD::SETULT: - // ALL of these operations will work if we either sign or zero extend - // the operands (including the unsigned comparisons!). Zero extend is - // usually a simpler/cheaper operation, so prefer it....