Displaying 7 results from an estimated 7 matches for "setopcode".
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getopcode
2012 Aug 17
1
[LLVMdev] Generate data16 assembly instruction for TLS with PIC
...he assembly file will not have
data16 instruction)
I search the llvm project and find some clues in this
file: lib/Target/X86/X86MCInstLower.cpp
static void LowerTlsAddr(...)
{
bool is64Bits = MI.getOpcode() == X86::TLS_addr64;
....
if (is64Bits) {
MCInst prefix;
prefix.setOpcode(X86::DATA16_PREFIX);
....
}
....
}
I think it is the logic to generate data16 instruction, but I wonder why
gcc report warning. Is it a LLVM's bug?
Thanks for your time in advance :D
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2012 Dec 17
0
[LLVMdev] LLVMdev Digest, Vol 98, Issue 33
...)
>
> I search the llvm project and find some clues in this
> file: lib/Target/X86/X86MCInstLower.cpp
> static void LowerTlsAddr(...)
> {
> bool is64Bits = MI.getOpcode() == X86::TLS_addr64;
> ....
> if (is64Bits) {
> MCInst prefix;
> prefix.setOpcode(X86::DATA16_PREFIX);
> ....
> }
> ....
> }
>
> I think it is the logic to generate data16 instruction, but I wonder why
> gcc report warning. Is it a LLVM's bug?
> Thanks for your time in advance :D
> -------------- next part --------------
> An HTM...
2016 May 21
1
Using an MCStreamer Directly to produce an object file?
..., so, something like:
const llvm::Twine tname("my_label_name");
llvm::MCSymbol* mcs = Ctx.getOrCreateSymbol(tname);
Str->EmitLabel(mcs);
Or even something more complicated like setting up an MCInst and all
it's operands:
llvm::MCInst *llinst = new MCInst();
llinst->setOpcode(input_opcode);
llinst->addOperand(llvm::MCOperand::createReg(input_reg0));
llinst->addOperand(llvm::MCOperand::createReg(input_reg1));
const llvm::Twine tname("label_name");
const llvm::MCSymbol* mcs = Ctx.getOrCreateSymbol(tname);
const llvm::MCSymbolRefExpr *msre = llvm:...
2017 Aug 26
2
Error in generating Object Code for implemented assembly vector instructions
...default: llvm_unreachable("Invalid opcode");
case X86::P_256B_LOAD_DWORD: NewOpc = X86::P_256B_LOAD_DWORD;
break;
case X86::P_256B_STORE_DWORD: NewOpc = X86::P_256B_STORE_DWORD;
break;
case X86::P_256B_VADD: NewOpc = X86::P_256B_VADD; break;
}
OutMI.setOpcode(NewOpc);
break;
when i used the command:
llc -x86-asm-syntax=intel -debug -p-enabled=true -filetype=obj
sum-vec03.ll>objpon 2>&1
i am getting the following error:
********** COMPUTING STACKMAP LIVENESS: foo **********
Unknown immediate size
UNREACHABLE executed at lib/Target/X86/M...
2014 Aug 20
2
[LLVMdev] ARMv4T Copy Lowering
...quot;
using namespace llvm;
Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
: ARMBaseInstrInfo(STI), RI(STI) {
}
/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
NopInst.setOpcode(ARM::tMOVr);
NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
NopInst.addOperand(MCOperand::CreateReg(0));
}
unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {...
2016 May 23
0
Using an MCStreamer Directly to produce an object file?
2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
...e must be a packet to end a loop.
>> + // FIXME: when shuffling is always run, this shouldn't be needed.
>> + HexagonMCInst Nop;
>> + StringRef NoAnnot;
>>
>> - O<< packetPadding<< startPacket<< '\n';
>> - Nop.setOpcode(Hexagon::NOP);
>> - printInstruction(&Nop, O);
>> - O<< packetPadding<< endPacket;
>> + Nop.setOpcode (Hexagon::NOP);
>> + Nop.setStartPacket (MI->isStartPacket());
>> + printInst (&Nop, O, NoAnnot);
>> + }
>>...