Displaying 20 results from an estimated 108 matches for "sethi".
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2016 Apr 15
3
[Sparc] Load address with SETHI
Hi,
I'm trying to implement __builtin_setjmp / __builtin_longjmp for Sparc processors. I think I'm very close, but I can't work out how to issue BuildMI-type instructions to load the address of the recovery location (set in setjmp) into a register using the SETHI / OR combination. I can't see any equivalent code anywhere else in Sparc.
I imagine this is similar if I try to make a CALLRi or CALLrr call, but looking through the code there isn't yielding any obvious solution to me.
Would anyone be able to point me at a relevant piece of code that can...
2011 Jan 20
2
[LLVMdev] Modifying the patterns/ instruction selection phase in LLVM 2.7
...ers "functions with particular
> type" ( eg. p0, p1) to the intrinsic.
> 3. Create a instruction pattern in SparcInstrInfo.td that matches
> the intrinsic.
> From the arguments to the intrinsic function, encode the
> "<number>" and output a "sethi" instruction.
>
> Thanks,
> Venkatraman
>
>
> On Tue, Jan 18, 2011 at 11:18 PM, Raghu Prabhakar<raghu at cs.ucla.edu> wrote:
>> Hello all,
>>
>> I am trying to modify the Sparc backend to do something for my team's project, to do the following.
&g...
2011 Jan 19
2
[LLVMdev] Modifying the patterns/ instruction selection phase in LLVM 2.7
Hello all,
I am trying to modify the Sparc backend to do something for my team's project, to do the following.
Whenever the backend encounters a call to one particular type of function names (functions like p0(), p1()..etc), I want the backend to generate a "sethi %g0, <number>", and NOT a "call p0, call p1..." instruction. However, the backend should work as usual for any other function name.
Now I figured that there are two ways to do this :
1) Modifying the "SparcISelLowering.cpp" to emit a special SDNode (with a special o...
2017 Dec 30
0
[PATCH] Fix sparc assembly when compiled as PIC
..._ASM_LABEL(name) name
-#ifdef PIC
+#ifdef __PIC__
/*
* PIC_PROLOGUE() is akin to the compiler generated function prologue for
* PIC code. It leaves the address of the Global Offset Table in DEST,
@@ -83,12 +83,20 @@
0: \
add dest,%o7,dest; \
mov tmp, %o7
+#define SET(var,base,dest) \
+ sethi %gdop_hix22(var), dest; \
+ xor dest, %gdop_lox10(var), dest; \
+ ldx [base + dest], dest, %gdop(var)
#else
#define PIC_PROLOGUE(dest,tmp) \
mov %o7,tmp; 3: call 4f; nop; 4: \
sethi %hi(_C_LABEL(_GLOBAL_OFFSET_TABLE_)-(3b-.)),dest; \
or dest,%lo(_C_LABEL(_GLOBAL_OFFSET_TABLE_)-(3b-.)),dest;...
2011 Jan 20
0
[LLVMdev] Modifying the patterns/ instruction selection phase in LLVM 2.7
...assembly code because I need to encode the registers into the
"number".
For instance, if the call instruction is %result = call i32 @foo(i32
%a) and the result is assigned to register %l0 and the variable "a"
to register %l1, then I encode all foo, %l0 and %l1 and generate a
sethi instruction.
thanks,
Venkatraman
On Thu, Jan 20, 2011 at 12:31 PM, John Criswell <criswell at illinois.edu> wrote:
> On 1/20/11 12:27 PM, Venkatraman Govindaraju wrote:
>
> Just out of curiosity, have either of you considered writing an LLVM
> transform that simply replaces th...
2019 Jan 18
0
[klibc:master] Fix sparc assembly when compiled as PIC
..._ASM_LABEL(name) name
-#ifdef PIC
+#ifdef __PIC__
/*
* PIC_PROLOGUE() is akin to the compiler generated function prologue for
* PIC code. It leaves the address of the Global Offset Table in DEST,
@@ -83,12 +83,20 @@
0: \
add dest,%o7,dest; \
mov tmp, %o7
+#define SET(var,base,dest) \
+ sethi %gdop_hix22(var), dest; \
+ xor dest, %gdop_lox10(var), dest; \
+ ldx [base + dest], dest, %gdop(var)
#else
#define PIC_PROLOGUE(dest,tmp) \
mov %o7,tmp; 3: call 4f; nop; 4: \
sethi %hi(_C_LABEL(_GLOBAL_OFFSET_TABLE_)-(3b-.)),dest; \
or dest,%lo(_C_LABEL(_GLOBAL_OFFSET_TABLE_)-(3b-.)),dest;...
2012 Jan 09
2
[LLVMdev] Sethi-Ullman Scheduling
I'm looking over the RR list scheduler and am wondering about how the
Sethi-Ullman numbers are used.
The comments and the code indicate that the node with the lowest S-I
number is scheduled first. Traditionally S-I scheduling schedules the
node with the highest S-I number first.
What am I missing?
-Dave
2011 Jan 20
0
[LLVMdev] Modifying the patterns/ instruction selection phase in LLVM 2.7
...te a lowering pass that lowers "functions with particular
type" ( eg. p0, p1) to the intrinsic.
3. Create a instruction pattern in SparcInstrInfo.td that matches
the intrinsic.
From the arguments to the intrinsic function, encode the
"<number>" and output a "sethi" instruction.
Thanks,
Venkatraman
On Tue, Jan 18, 2011 at 11:18 PM, Raghu Prabhakar <raghu at cs.ucla.edu> wrote:
> Hello all,
>
> I am trying to modify the Sparc backend to do something for my team's project, to do the following.
>
> Whenever the backend encounters...
2017 Dec 30
6
building debug version of klibc
Hello!
Can someone please help me in building debug version of klibc ?
I've cloned git://git.kernel.org/pub/scm/libs/klibc/klibc.git , but
failed to build it with debug info
added "-g" to HOSTCFLAGS in Makefile, but
$ make -j KLIBCKERNELSRC=`pwd`/../linux-2.6/usr
still strips every debug symbol , and i'm failed to change
scripts/Kbuild.klibc and Makefile to remove strip
2012 Jan 12
1
[LLVMdev] A question of Sparc assembly generated by llc
Hi,
There are some generated Sparc assembly code like this:
main: ! @main
! BB#0:
save %sp, -112, %sp
sethi 0, %l0
or %g0, 5, %l1
st %l0, [%fp+-4]
st %l1, [%fp+-8]
st %l1, [%fp+-12]
sethi %hi(.L.str), %l1
ld [%fp+-8], %o1
add %l1, %lo(.L.str), %l1
or %g0, %l1, %o0
call printf
nop
ld [%fp+-12], %o2
ld [%fp+-8], %l2
sethi %hi(.L.strQ521), %l3
add %l3, %lo(.L.strQ521), %o0
or %g0, %l2, %o1...
2012 Jan 09
0
[LLVMdev] Sethi-Ullman Scheduling
David Greene <dag at cray.com> writes:
> What am I missing?
Perhaps that this is bottom-up scheduling, so picking the lower-numbered
node is the same as picking the higher-numbered node in a top-down
scheduler?
Just looking for confirmation. Thanks!
-Dave
2009 Aug 19
2
[LLVMdev] Solaris (sparc) llc bugs
...roblems. However, llc has failed to generate valid
SPARC assembler code even on the helloworld example. Here is the generated
code:
sakharov at trillian:~$ cat ./test.s
.text
.align 16
.globl main
.type main, #function
main:
save %o6, -96, %o6
sethi %hi(.str), %l0
add %l0, %lo(.str), %o0
call puts
nop
sethi 0, %i0
restore %g0, %g0, %g0
retl
nop
.section .rodata.str1.1,"aMS", at progbits,1
.align 2
.type .str,#object
.size .str,15
.str:...
2006 May 01
7
where should I put my hand-coded classes
I have a class that is hand-coded (not generated using generator).
Is there a preferred location for the file.
app/components ?
does it matter?
Thanks,
--
Posted via http://www.ruby-forum.com/.
2011 Dec 16
2
[LLVMdev] striping of stdio information in llvm-gcc and clang
...he .s file is the
following without 'stderr'
.file "print.c"
.section ".rodata"
.align 8
.LLC0:
.asciz "Error!\n"
.section ".text"
.align 4
.global main
.type main, #function
.proc 04
main:
!#PROLOGUE# 0
save %sp, -112, %sp
!#PROLOGUE# 1
sethi %hi(__iob+32), %g1
or %g1, %lo(__iob+32), %o0
sethi %hi(.LLC0), %g1
or %g1, %lo(.LLC0), %o1
call fprintf, 0
nop
mov 0, %g1
mov %g1, %i0
ret
restore
.size main, .-main
.ident "GCC: (GNU) 3.4.6"
While the .s file generated by llc gives the following code with
'stderr' a...
2008 Oct 18
5
Getting names of variables without quotes
Dear R-helpers,
hello
I am seeking your help in somehow getting names of variables without quotes (" ").
Let us say, we have a table with 3 variables V1, V2 and V3. After the table is read, I get names of the variables (thro' the following code) as under quotes (like "V1" rather than the original representation V1)
2012 May 07
1
Topic Modeling- package lda
...e to apply it on a new dataset as the input parameter asks
for document_sums which is an output of the result from fitting the
model. Is there any way in which I can use my existing model and apply
it on new data without creating a new model.
Any help will be appreciated.
Thanks in advance.
Ankit Sethi
2007 Sep 04
0
[LLVMdev] How to put a pass for last?
...ught machine functions and basic blocks inside the
functions, there are still machine instructions that I cant reach.
This is the beginnig of the asm output of my example test program:
.text
.align 16
.globl main
.type main, #function
main:
nop
sethi 4194296, %g1
or %g1, 56, %g1
save %g1, %o6, %o6
sethi 0, %l0
The nop right before sethi is one instruction I'm not being able to reach in
my pass.
But there is more:
add %l0, 1, %l0
st %l0, [%i6+-12]
.BB1_2: ! bb8
ld [%i6+-12], %l0
subcc...
2012 Feb 10
1
[LLVMdev] Remove redundant code after frame index elimination
Hi list,
I added custom code to eliminate frame index references. I replace each
FI reference with a subtraction from my frame pointer register (just
like ebp in x86). Its result is stored in another register which is used
by the load/store instructions. Nevertheless, this operation gives me
redundant subs that I would like to remove after all fi references have
been eliminated. For example:
2006 May 02
4
passing data from controller to rjs and then to partial
Hello Experts,
I am fetching data in my controller from a web service
def search
response = @@api.DoSearch()
end
and in my .rjs template, I am doing
page.replace_html ''fields_chooser'', :partial => ''fields_chooser''
,:locals =>{:response => response}
page.visual_effect(:Appear, ''fields_chooser'')
and in _fields_chooser.rhtml, I
2008 May 28
1
Suitable package for carrying out sigma and beta convergence in panel data
...aware of the availbaility of suitable package(s)/ code in the language. Can any one help me in letting me know of appropriate package/procedural steps to undertake the anlaysis. Kindly let me know as well, format of the input data file for such a package.
Regards
Amarjit Singh Sethi
Bollywood, fun, friendship, sports and more. You name it, we have it on http://in.promos.yahoo.com/groups/bestofyahoo/
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