search for: setd_r2r

...t individually encoded into bits but instead they are combined into a single field using arithmetic operations. Due to the way the aaaaa is derived it is guaranteed to be greater than 27. The value of these bits is how the INITSP_2r and ADD_3r instructions should be distinguished. I tried to handle SETD_r2r the same way as ADD_3r (specifying the value of the bits that are fixed and using the a custom DecoderMethod for the rest). With this change I can disassemble INITSP_2r instructions but it breaks the decoding of ADD_3r instructions. Consider the following bit pattern: 0001000000000000 This is an...

...t individually encoded into bits but instead they are combined into a single field using arithmetic operations. Due to the way the aaaaa is derived it is guaranteed to be greater than 27. The value of these bits is how the INITSP_2r and ADD_3r instructions should be distinguished. I tried to handle SETD_r2r the same way as ADD_3r (specifying the value of the bits that are fixed and using the a custom DecoderMethod for the rest). With this change I can disassemble INITSP_2r instructions but it breaks the decoding of ADD_3r instructions. Consider the following bit pattern: > > 0001000000000000 &g...