Displaying 11 results from an estimated 11 matches for "set_fixmap_nocache".
2018 Feb 09
0
retpoline mitigation and 6.0
...;mp_register_ioapic+194>: movb $0x1,-0x3e2cb1b9(%edi)
2: gsi_base = 0
3: *(int *)0xc1b2fe34 = 0
(gdb)
416 ioapics[idx].mp_config.apicaddr = address;
1: x/i $pc
=> 0xc1046a79 <mp_register_ioapic+201>: mov %esi,-0x3e2cb1b8(%edi)
2: gsi_base = 0
3: *(int *)0xc1b2fe34 = 0
(gdb)
418 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
1: x/i $pc
=> 0xc1046a7f <mp_register_ioapic+207>: lea 0x5(%ebx),%eax
2: gsi_base = 0
3: *(int *)0xc1b2fe34 = 0
(gdb)
cachemode2protval (pcm=_PAGE_CACHE_MODE_UC) at ./arch/x86/include/asm/pgtable_types.h:439
439 return __cachemode2pte_tbl[pcm];
1: x...
2018 Feb 09
2
retpoline mitigation and 6.0
On Fri, 2018-02-09 at 10:36 +0000, David Woodhouse wrote:
>
> Did you get anywhere with the function attribute? Having isolated the
> next boot failure to "it goes away if I compile io_apic.c without
> retpoline", bisecting it per-function would help to further delay the
> bit where I actually have to start *thinking*...
It's mp_register_ioapic(), and only when
2018 Feb 09
3
retpoline mitigation and 6.0
..._base = 0
> 3: *(int *)0xc1b2fe34 = 0
> (gdb)
> 416 ioapics[idx].mp_config.apicaddr = address;
> 1: x/i $pc
> => 0xc1046a79 <mp_register_ioapic+201>: mov %esi,-0x3e2cb1b8(%edi)
> 2: gsi_base = 0
> 3: *(int *)0xc1b2fe34 = 0
> (gdb)
> 418 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
> 1: x/i $pc
> => 0xc1046a7f <mp_register_ioapic+207>: lea 0x5(%ebx),%eax
> 2: gsi_base = 0
> 3: *(int *)0xc1b2fe34 = 0
> (gdb)
> cachemode2protval (pcm=_PAGE_CACHE_MODE_UC) at ./arch/x86/include/asm/
> pgtable_types.h:439
> 43...
2008 Nov 27
0
[PATCH] x86, hpet: check hpet existence
...ff -r ab0c1bdede53 xen/arch/x86/hpet.c
--- a/xen/arch/x86/hpet.c Wed Nov 26 11:14:26 2008 +0000
+++ b/xen/arch/x86/hpet.c Wed Nov 26 19:22:03 2008 -0500
@@ -273,6 +273,8 @@
return hpet_rate;
system_reset_latch = system_reset_counter;
+ if ( !hpet_address )
+ return 0;
set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
hpet_id = hpet_read32(HPET_ID);
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2010 Nov 09
0
[PATCH] ia64: fix the build (again)
...t;
#include "../vtd.h"
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -119,8 +119,12 @@ static void map_igd_reg(void)
igd_reg = (igd_mmio & IGD_BAR_MASK) + 0x2000;
/* ioremap this physical page */
+#if defined(CONFIG_X86)
set_fixmap_nocache(FIX_IGD_MMIO, igd_reg);
igd_reg_va = (u8 *)fix_to_virt(FIX_IGD_MMIO);
+#else
+ igd_reg_va = ioremap_nocache(igd_reg, 0x100);
+#endif
}
/*
--- a/xen/include/asm-ia64/hvm/vacpi.h
+++ b/xen/include/asm-ia64/hvm/vacpi.h
@@ -24,10 +24,6 @@
#include <public/arch-ia64/hvm/save.h> /* for...
2005 Aug 31
0
[PATCH] Re: SMP dom0 with 8 cpus of i386
..., as seen in the following code
from mmconfig.c .
static inline void pci_exp_set_dev_base(int bus, int devfn)
{
u32 dev_base = pci_mmcfg_base_addr | (bus << 20) | (devfn << 12);
if (dev_base != mmcfg_last_accessed_device) {
mmcfg_last_accessed_device = dev_base;
set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
}
}
static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
unsigned long flags;
if (!value || (bus > 255) || (devfn > 255) || (reg > 4095))
return -EINVAL;
spin_loc...
2012 Sep 11
2
[PATCH RFC 5/8] ns16550: MMIO adjustments
...ct ns16550 *uart)
@@ -265,7 +271,17 @@ static void __init ns16550_init_preirq(s
/* I/O ports are distinguished by their size (16 bits). */
if ( uart->io_base >= 0x10000 )
+ {
+#ifdef CONFIG_X86
+ enum fixed_addresses idx = FIX_COM_BEGIN + (uart - ns16550_com);
+
+ set_fixmap_nocache(idx, uart->io_base);
+ uart->remapped_io_base = (void __iomem *)fix_to_virt(idx);
+ uart->remapped_io_base += uart->io_base & ~PAGE_MASK;
+#else
uart->remapped_io_base = (char *)ioremap(uart->io_base, 8);
+#endif
+ }
ns16550_setup_preirq(uart);...
2005 Sep 01
0
RE: [PATCH] Re: SMP dom0 with 8 cpus of i386
...> mmconfig.c .
>
> static inline void pci_exp_set_dev_base(int bus, int devfn) {
> u32 dev_base = pci_mmcfg_base_addr | (bus << 20) | (devfn << 12);
> if (dev_base != mmcfg_last_accessed_device) {
> mmcfg_last_accessed_device = dev_base;
> set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
> }
> }
>
> static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
> unsigned int devfn, int reg, int len, u32 *value) {
> unsigned long flags;
>
> if (!value || (bus > 255) || (devfn > 255) || (reg > 4095...
2013 Jul 09
6
4.3 regression in booting on a particular platform
Jan,
I was given a machine to diagnose a boot problem on xen 4.3, that used
to work on 4.2, and have bisected to the following changeset:
commit d0d4635d034f202bb401a6efa3ba61530f3854ab
Author: Jan Beulich <jbeulich@suse.com>
Date: Thu Nov 22 10:47:58 2012 +0100
implement vmap()
... and use it as basis for a proper ioremap() on x86.
Signed-off-by: Jan Beulich
2010 Aug 20
0
[PATCH 1/2] Implement APEI ERST feature to Xen
...E_MASK)
+ - (paddr & PAGE_MASK)) >> PAGE_SHIFT) + 1;
+ if (apei_range_nr + pg > FIX_APEI_RANGE_MAX)
+ return NULL;
+
+ start_nr = apei_range_nr + pg -1;
+ for (i = 0; i < pg; i++) {
+ cur_nr = start_nr - i;
+ set_fixmap_nocache(FIX_APEI_RANGE_BASE + cur_nr,
+ paddr + (i << PAGE_SHIFT));
+ apei_range_nr++;
+ }
+
+ return (void __iomem *)fix_to_virt(FIX_APEI_RANGE_BASE + start_nr);
+}
+
+/*
+ * Used to pre-map the specified IO memory area. First try to fi...
2008 Nov 13
69
[PATCH 00 of 38] xen: add more Xen dom0 support
Hi Ingo,
Here''s the chunk of patches to add Xen Dom0 support (it''s probably
worth creating a new xen/dom0 topic branch for it).
A dom0 Xen domain is basically the same as a normal domU domain, but
it has extra privileges to directly access hardware. There are two
issues to deal with:
- translating to and from the domain''s pseudo-physical addresses and
real machine