search for: selliott

Hey llvm-dev, What's the best method to test performance of Clang generated executables? Are the nightly tests in test-suite sufficient? I'm looking for publicly available tests/suites with a good breadth of coverage... Thanks, Cam -------------- next part -------------- An HTML attachment was scrubbed... URL:

...nying release note? What about format changes to llvm binutils output? And which tools should we be producing release notes for? Should they exist for FileCheck, lit or yaml2obj even though these are primarily intended for our internal testing? > >On Wed, 29 Apr 2020 at 15:49, Sam Elliott <selliott at lowrisc.org<mailto:selliott at lowrisc.org>> wrote: >This approximately follows my understanding and expectation. > >I think that, if you have commit access, commits to improve release notes fall under the contribution guidelines for documentation and therefore do not require a...

...te? What about format changes to > llvm binutils output? And which tools should we be producing release notes > for? Should they exist for FileCheck, lit or yaml2obj even though these are > primarily intended for our internal testing? > > On Wed, 29 Apr 2020 at 15:49, Sam Elliott <selliott at lowrisc.org> wrote: > >> This approximately follows my understanding and expectation. >> >> I think that, if you have commit access, commits to improve release notes >> fall under the contribution guidelines for documentation and therefore do >> not require a...

Hi all, I am trying to implement statepoints for the AArch64 target and I’m running into the issue where the following bitcode: define i32 addrspace(1)* @test(i32 addrspace(1)* %ptr) gc "statepoint-example" { entry: call token (i64, i32, i1 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i1f(i64 0, i32 0, i1 ()* @foo, i32 0, i32 0, i32 0, i32 0, i32 addrspace(1)* %ptr) ret

...d the GOT, where the address of global variables of global scope reside. This model assumes that the distance between the GP and the global data area, GOT and local scope variables is defined at link time. __ Evandro Menezes ◊ SiFive ◊ Austin, TX > On Mar 23, 2020, at 6:20, Sam Elliott <selliott at lowrisc.org> wrote: > > Eli, > > Yep, we’re looking at a ROPI/RWPI model for RISC-V and it is shaking out to be fairly similar to this model (though we’ve only been looking at it for 32-bit RISC-V). > > I suppose how I’m thinking about the difference between a ROPI/RWPI m...

...The virtual hook nethod isCheaperCommuteAddMul will return true by default, but specific targets like arm/riscv can make their own decision. Just like virtual bool TargetLowering::decomposeMulByConstant What's your opinion? Ben At 2020-07-01 02:29:36, "Sam Elliott" <selliott at lowrisc.org> wrote: >The relevant DAGCombine is controlled by a hook: `DAGCombiner::isMulAddWithConstProfitable`. > >It may be that, when optimising for size, this hook should take into account whether `c1*c2` fits into an add immediate, something that the DAGCombiner has access to v...

This approximately follows my understanding and expectation. I think that, if you have commit access, commits to improve release notes fall under the contribution guidelines for documentation and therefore do not require a full Phabricator review. I know Alex Bradbury tries to coordinate the RISC-V backend-related release notes based on the backend changes since the last release, and this seems

...Thanks again, > > Hal > > >> >> Best, >> >> Alex > > -- > Hal Finkel > Lead, Compiler Technology and Programming Languages > Leadership Computing Facility > Argonne National Laboratory -- Sam Elliott Software Developer - LLVM lowRISC CIC selliott at lowrisc.org --

...; _______________________________________________ >>> LLVM Developers mailing list >>> llvm-dev at lists.llvm.org >>> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >> -- >> Sam Elliott >> Software Developer - LLVM >> lowRISC CIC >> selliott at lowrisc.org >> -- >> >> >> >> >> >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

All, I am running samba-3.0.28-1.el5_2.1.x86_64.rpm on RHEL 5 x64. I am sharing out approximately 7TB via samba and a 'few' of my users are complaining of latency when accessing their shares via Windows Explorer. Mind you the disk is about 93% full which I am sure is a factor but before I go into battle I wanted to make sure there were no known limitations or issues. Thanks in

Hi Devs, since risc-v has a register $tp which is thread pointer. is it possible to have __builtin_thread_pointer for RISC-V? I am not sure what could be corresponding instructions? ./kamlesh

.../gcc/trunk/gcc/testsuite/gcc.c-torture/ [2]: https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/WebAssembly/README.txt [3]: https://gcc.gnu.org/onlinedocs/gccint/C-Tests.html [4]: https://github.com/embecosm/gcc-for-llvm-testing -- Sam Elliott Software Developer - LLVM lowRISC CIC selliott at lowrisc.org --

Hi all, I have a global array declared as: table = internal constant [8 x [256 x i32]] ... At the moment I'm able to get the reference to table using Constant* g_var = cast<GlobalVariable>(I.getOperand(0))->getInitializer(); ( please consider I to be a GetElementPtrInst object ). Now I would like to understand how to get the address of table[2][3], for instance, considering that I

Hi all developers, I'm changing compiler from gcc to llvm on a RISCV target now. but I found in some case the assembly code generated by llvm is much more than gcc. It cause my program's performance about 40% decrease. The flowing is a simple test code. It shows the problem. We can see than gcc prefer to use pointer to iterate the array, but llvm perfere to use index to iterate

...eference to `__builtin_avr_delay_cycles(unsigned long)' as well as troubles which seem to be originating from my C++ usage within the firmware undefined reference to `vtable for __cxxabiv1::__class_type_info' Kind regards, Alex ________________________________________ Von: Sam Elliott [selliott at lowrisc.org] Gesendet: Mittwoch, 25. März 2020 13:17 An: Alexander Entinger Cc: llvm-dev at lists.llvm.org Betreff: Re: [llvm-dev] Build Clang/LLVM for AVR It looks like you’re cross-compiling for an embedded target, so you need to be careful about how you treat headers (like libc’s), as the x8...

Hi, We are still on track to retire SVN and complete the transition to GitHub by Oct 21, 2019 (This year's US Dev Meeting). Even though this 3+ months away, it is very important that you begin to migrate your workflows to GitHub as soon as possible. For developers, this means using the git-llvm script to commit changes and for CI systems or other read-only use cases can begin fetching code

Op di 3 sep. 2019 om 18:36 schreef Finkel, Hal J. via llvm-dev < llvm-dev at lists.llvm.org>: > On 9/3/19 7:19 AM, Sam Elliott wrote: > > There are 1500 tests total, and about 100 on the platform-agnostic > blacklist. Alex and I do not think this is an onerous burden for > maintenance, either as an external test suite or if the test suite is > imported. > > > >

On Fri, 30 Aug 2019 at 17:34, Finkel, Hal J. via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > On 8/30/19 10:18 AM, Sam Elliott via llvm-dev wrote: > > TL;DR: I am proposing to add the GCC C Torture suite [1], as an additional external source of tests for the “nightly” test suite. If you are willing to review the patch, it is here: https://reviews.llvm.org/D66887 >

Yes - this has been in InstCombine for a long time: https://github.com/llvm/llvm-project/blob/master/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp#L268 We could say that the canonicalization should be reversed, but that probably uncovers more missing optimizations. The code size concern is legitimate. For example on x86, gcc asm is 2 bytes smaller on this example:

Oh, I wasn’t really thinking about devices without an MMU where the addresses are physically separated. Makes sense. This reminds me of rwpi on ARM; it has a sort of similar scheme of referring to data indirectly through a pointer, but it also changes the ABI to keep the pointer in a reserved register. -Eli From: Evandro Menezes <evandro.menezes at sifive.com> Sent: Friday, March 20, 2020