Displaying 20 results from an estimated 60 matches for "selectbasicblock".
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...this=0x4b68400) at
/tmp/llvm-svn/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp:602
#6 0x0000000803275459 in llvm::SelectionDAGISel::CodeGenAndEmitDAG
(this=0x45174d0) at
/tmp/llvm-svn/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:547
#7 0x00000008032740fc in llvm::SelectionDAGISel::SelectBasicBlock
(this=0x45174d0, Begin={<std::iterator<std::bidirectional_iterator_tag,
const llvm::Instruction, long int, const llvm::Instruction*, const
llvm::Instruction&>> = {<No data fields>}, NodePtr = 0x4530ed0},
End={<std::iterator<std::bidirectional_iterator_tag, const
llv...
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...emitPrologue even when RET instruction is already
> there. This seems to be a bug.
I don't think I believe this; emitPrologue should not be generating a
TCRETURN at all, and line 1037 is generating a PROLOG_LABEL. Why do
you say it's a TCRETURN?
The way this is supposed to work:
SelectBasicBlock calls visit on the Call instruction, leading to
visitCall:
which winds up in X86TargetLowering::LowerCall:
which generates the TCRETURN and sets the isTailCall argument to True
which causes the loop in SelectBasicBlock to exit early, causing it to
skip the RET.
It looks like the incoming RET...
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On Aug 27, 2010, at 3:43 PMPDT, Yuri wrote:
> On 08/27/2010 12:13, Dale Johannesen wrote:
> Here's what happens:
> The first instruction created is RET.
> SelectBasicBlock is called.
> TCRETURNri64 is created from within it.
> HasTailCall is set to true as you mentioned.
> Cycle in SelectionDAGISel::SelectBasicBlock skips the rest.
>
> All like you described. But the RET instruction still stays in the
> end.
> RET is skipped by visit but I gues...
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On 08/27/2010 11:32, Yuri wrote:
> As I understand only one of TCRETURNri64 and RET should be created.
> I have sources of rev.112200.
>
> Here is the stack when TCRETURNri64 instruction is created:
> #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr
> (this=0x30eb000, TID=@0x803a78940, DL={LineCol = 0, ScopeIdx = 0},
> NoImp=false) at
2016 Oct 24
2
Accessing the associated LLVM IR Instruction for an SDNode used in instruction selection (back end)
...57 AM, Alex Susu via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>>
>> Hello. I would like to access the LLVM IR Instruction from which an SDNode (from
>> SelectionDAG) originates. For this I have modified: -
>> llvm/lib/CodeGen/SelectionDAGISel.cpp, SelectionDAGISel::SelectBasicBlock(), namely I
>> put SDB->clear() at the beginning of the method in order to avoid clearing NodeMap
>> after creating the initial SelectionDAG from LLVM IR, since I want to access it after
>> that; - llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h - added an accessor for
>...
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
...rinsic itself should define multiple IR outputs rather than using any ty.
But the intrinsic returns a record so in the input ll-file it is one result
%_tmp3 = call %rec6 @llvm.phx.divm.u16.rec6(i16 %_tmp1, i16 %_tmp2)
and then the return value struct is lowered to two i16:s by
SelectionDAGISel::SelectBasicBlock:
// Lower the instructions. If a call is emitted as a tail call, cease
emitting
// nodes for this block.
for (BasicBlock::const_iterator I = Begin; I != End &&
!SDB->HasTailCall; ++I)
SDB->visit(*I);
just prior to the selection.
> I’m also not sure if tablegen cu...
2011 Jun 06
4
[LLVMdev] Understanding SelectionDAG construction
I am trying to understand the SelectionDAG construction from LLVM IR. I have
gone through the doc "The LLVM Target-Independent Code Generator" on LLVM
site. This gives a great initial overview. However I am unable to catch the
actual control flow for the llvm->selectionDag conversion.
The flags "-view-sched-dags".. described in the doc doesn't seem to work. (
"llc
2016 Oct 21
2
Accessing the associated LLVM IR Instruction for an SDNode used in instruction selection (back end)
Hello.
I would like to access the LLVM IR Instruction from which an SDNode (from
SelectionDAG) originates. For this I have modified:
- llvm/lib/CodeGen/SelectionDAGISel.cpp, SelectionDAGISel::SelectBasicBlock(),
namely I put SDB->clear() at the beginning of the method in order to avoid clearing
NodeMap after creating the initial SelectionDAG from LLVM IR, since I want to access it
after that;
- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h - added an accessor for the
private NodeMap...
2011 Jun 06
0
[LLVMdev] Understanding SelectionDAG construction
Hi Ankur,
> The flags "-view-sched-dags".. described in the doc doesn't seem to work. (
> "llc -help" doesn't list it ).
as far as I remember, displaying DAGs during compilation is only enabled
in "debug builds" [1] of LLVM. You probably have to re-configure and
re-compile LLVM to enable this feature.
Best regards,
Christoph
[1]
2007 Apr 06
3
[LLVMdev] llc assertion failure
...ctionDAGISel::ScheduleAndEmitDAG(llvm::SelectionDAG&)+0x73)[0x863e64d]
/home/lefever/work/install/bin/llc[0x84edf05]
/home/lefever/work/install/bin/llc(llvm::SelectionDAGISel::CodeGenAndEmitDAG(llvm::SelectionDAG&)+0x13b)[0x863e7ab]
/home/lefever/work/install/bin/llc(llvm::SelectionDAGISel::SelectBasicBlock(llvm::BasicBlock*,
llvm::MachineFunction&, llvm::FunctionLoweringInfo&)+0xad)[0x8652ca7]
/home/lefever/work/install/bin/llc(llvm::SelectionDAGISel::runOnFunction(llvm::Function&)+0x5d2)[0x865449e]
/home/lefever/work/install/bin/llc[0x851d559]
/home/lefever/work/install/bin/llc(llvm::FP...
2016 Mar 30
0
Instruction selection pattern for intrinsic returning llvm_any_ty
...tmp1, i16 %_tmp2)
>
> and then the return value struct is lowered to two i16:s by
This seems like a strange way to do it. Do you need it to be an arbitrary struct type for some reason? Having multiple result types that expand into a struct would be more normal
>
> SelectionDAGISel::SelectBasicBlock:
>
> // Lower the instructions. If a call is emitted as a tail call, cease emitting
> // nodes for this block.
> for (BasicBlock::const_iterator I = Begin; I != End && !SDB->HasTailCall; ++I)
> SDB->visit(*I);
>
> just prior to the selection.
>
>>...
2010 Jun 01
2
[LLVMdev] Assertion when loading bitcode
...x00651128
1 lli 0x00651960
2 libc.so.6 0x40212600 __default_sa_restorer_v1 + 0
3 lli 0x00282ef0
4 lli 0x00283cec llvm::SelectionDAG::LegalizeTypes() + 608
5 lli 0x00233a10 llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 2944
6 lli 0x0023459c llvm::SelectionDAGISel::SelectBasicBlock(llvm::BasicBlock*, llvm::ilist_iterator<llvm::Instruction>, llvm::ilist_iterator<llvm::Instruction>, bool&) + 352
7 lli 0x00236960 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function&, llvm::MachineFunction&, llvm::MachineModuleInfo*, llvm::DwarfWriter*, llvm:...
2011 Mar 29
1
[LLVMdev] cross compiling to sparc with llvm
...VM-2.8svn.so 0xf6f56ee9
5 libLLVM-2.8svn.so 0xf6e43cf2
6 libLLVM-2.8svn.so 0xf6e5206a
7 libLLVM-2.8svn.so 0xf6e5615a llvm::SelectionDAG::LegalizeTypes() + 68
8 libLLVM-2.8svn.so 0xf6ef3a58 llvm::SelectionDAGISel::CodeGenAndEmitDAG()
+ 1022
9 libLLVM-2.8svn.so 0xf6ef312f
llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator<llvm::Instruction
const>, llvm::ilist_iterator<llvm::Instruction const>, bool&) + 219
10 libLLVM-2.8svn.so 0xf6ef4f8a
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 1476
11 libLLVM-2.8svn.so 0xf6ef2874
llvm::SelectionDAGISel::runOnMach...
2012 Jun 25
2
[LLVMdev] Is llc broken for Cortex-A9 + neon ?
...2085941 __assert_fail + 241
6 libLLVM-3.2svn.so 0x00007fe073cba4da
7 libLLVM-3.2svn.so 0x00007fe073cbcccd llvm::SelectionDAG::Legalize() + 269
8 libLLVM-3.2svn.so 0x00007fe073dc4e84 llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 1076
9 libLLVM-3.2svn.so 0x00007fe073dc7551 llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator<llvm::Instruction const>, llvm::ilist_iterator<llvm::Instruction const>, bool&) + 273
10 libLLVM-3.2svn.so 0x00007fe073dc7f17 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 2439
11 libLLVM-3.2svn.so 0x00007fe073dc902b llvm::SelectionDA...
2012 Jun 27
2
[LLVMdev] [NVPTX] Backend failure in LegalizeDAG due to unimplemented expand in target lowering
.../home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3689
#6 0x00007ffff6fb3862 in llvm::SelectionDAGISel::CodeGenAndEmitDAG
(this=0x697230) at
/home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:632
#7 0x00007ffff6fb2a84 in llvm::SelectionDAGISel::SelectBasicBlock
(this=0x697230, Begin=..., End=..., HadTailCall=@0x7fffffffd880)
at /home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:499
#8 0x00007ffff6fb5792 in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0x697230, Fn=...) at
/home/dmikushin/sandbox/src/llvm/lib/CodeGen/S...
2011 Jun 24
2
[LLVMdev] Infinite loop in llc on ARMv7 (LLVM HEAD from June 17)
...at
/export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:7732
#10 0x00acd9c0 in llvm::SelectionDAGISel::CodeGenAndEmitDAG (this=0x1be9f40)
at
/export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:559
#11 0x00acc9a0 in llvm::SelectionDAGISel::SelectBasicBlock
(this=0x1be9f40, Begin=..., End=...,
HadTailCall=@0x7ee91158)
at
/export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:414
#12 0x00acf420 in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0x1be9f40, Fn=...)
at
/export/home/karel/vcs/llvm-head/lib/Code...
2009 Aug 18
2
[LLVMdev] gcc4.4's -O2 is breaking include/llvm/CodeGen/ValueTypes.h
...0x0000000000be6e11
9 llc 0x0000000000badf80
10 llc 0x0000000000bae9d8 llvm::SelectionDAG::LegalizeTypes() + 824
11 llc 0x0000000000b71c14
llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 580
12 llc 0x0000000000b73d00
llvm::SelectionDAGISel::SelectBasicBlock(llvm::BasicBlock*,
llvm::ilist_iterator<llvm::Instruction>,
llvm::ilist_iterator<llvm::Instruction>) + 96
13 llc 0x0000000000b74103
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function&,
llvm::MachineFunction&, llvm::MachineModuleInfo*, llvm::DwarfWriter*,
ll...
2007 Apr 06
0
[LLVMdev] llc assertion failure
...cheduleAndEmitDAG(llvm::SelectionDAG&)+0x73)[0x863e64d]
> /home/lefever/work/install/bin/llc[0x84edf05]
> /home/lefever/work/install/bin/llc(llvm::SelectionDAGISel::CodeGenAndEmitDAG(llvm::SelectionDAG&)+0x13b)[0x863e7ab]
> /home/lefever/work/install/bin/llc(llvm::SelectionDAGISel::SelectBasicBlock(llvm::BasicBlock*,
> llvm::MachineFunction&, llvm::FunctionLoweringInfo&)+0xad)[0x8652ca7]
> /home/lefever/work/install/bin/llc(llvm::SelectionDAGISel::runOnFunction(llvm::Function&)+0x5d2)[0x865449e]
> /home/lefever/work/install/bin/llc[0x851d559]
> /home/lefever/work/inst...
2011 Mar 24
0
[LLVMdev] mblaze backend: unreachable executed
...;) + 4381
13 llc 0x0000000100522bc4 llvm::SelectionDAGBuilder::visit(unsigned int, llvm::User const&) + 1220
14 llc 0x00000001005286c9 llvm::SelectionDAGBuilder::visit(llvm::Instruction const&) + 105
15 llc 0x000000010054067f llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator<llvm::Instruction const>, llvm::ilist_iterator<llvm::Instruction const>, bool&) + 59
16 llc 0x0000000100541088 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 2396
17 llc 0x0000000100541730 llvm::SelectionDAG...
2012 Jun 29
0
[LLVMdev] [NVPTX] Backend failure in LegalizeDAG due to unimplemented expand in target lowering
...3.2svn.so 0x00007f395efdb4d2
7 libLLVM-3.2svn.so 0x00007f395efdfc3b
8 libLLVM-3.2svn.so 0x00007f395efdfd2d llvm::SelectionDAG::Legalize() + 49
9 libLLVM-3.2svn.so 0x00007f395f0d0d76
llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 2532
10 libLLVM-3.2svn.so 0x00007f395f0d2ae6
llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator<llvm::Instruction
const>, llvm::ilist_iterator<llvm::Instruction const>, bool&) + 228
11 libLLVM-3.2svn.so 0x00007f395f0d3524
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) +
2620
12 libLLVM-3.2svn.so 0x00007f395f0d3ade
llvm::SelectionDA...