Displaying 1 result from an estimated 1 matches for "select_isd_mul_v4i32".
2009 Jan 14
2
[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)
...nfo = (ops VR128, i8imm);
}
def MUL_1 : FooInst<(outs VR128:$dst),
(ins regsw:$src0, regsw:$src1),
"mul $dst, $src0, $src1",
[(set VR128:$dst, (mul regsw:$src0, regsw:$src1))]>;
The code generate by TableGen is:
SDNode *Select_ISD_MUL_v4i32(const SDValue &N) {
SDValue N0 = N.getOperand(0);
SDValue CPTmp0;
SDValue CPTmp1;
if (SelectRegsw(N, N0, CPTmp0, CPTmp1)) {
SDValue N1 = N.getOperand(1);
SDValue CPTmp0;
SDValue CPTmp1;
if (SelectRegsw(N, N1, CPTmp0, CPTmp1)) {
return Emit_1(N, FooVS::MUL_1, MVT::v...