Displaying 6 results from an estimated 6 matches for "seldag".
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iseldag
2015 Jan 27
4
[LLVMdev] Making a CopyToReg/CopyFromReg into a zext/sext?
I have a CopyToReg that is moving a 16bit reg to a 32bit reg, it's
currently being mapped out as a simple mov (not an ext), I would like to
change that to an ext. It seemed that the SelDAG was the easiest and
cleanest way to do this.
I can change the mov to an extension MI in the .td file; however, I can't
tell at that point whether it's a sext or a zext, so it seemed the SelDAG
was the better place to fix this.
Thanks.
On Tue, Jan 27, 2015 at 3:38 PM, Matt Arsenault <M...
2020 Apr 09
2
Supporting freeze in GlobalISel / freeze semantics in MIR
...R. We would like to add support for that, but it seems
that it is not yet clear how this freeze instruction is supposed to look
like in MIR.
In [2], which introduced the FREEZE node to SelectionDAG, there was a
lengthier discussion which concluded that for now proper handling was
only added to SelDAG and the MIR related patches would be left for a
follow up. We would like to accelerate this follow up, because we
obviously want to get our downstream backend working again.
One part of this discussion concerned how freeze should behave on MIR
level. Especially if there needs to be a MIR FREEZE...
2015 Jan 27
2
[LLVMdev] Making a CopyToReg/CopyFromReg into a zext/sext?
...e that to a zext or sext node based on signed or unsigned?
>
> I'm fairly unfamiliar with SelectionDAG process (outside of the docs on
> llvm website).
>
> It seems like I should be able to insert a custom hook using the
> register class to identify the type, potentially in ISelDAGToDag.cpp or is
> there a better place for this to be done?
>
> Thanks.
>
>
> It sounds to me like you are looking for the AssertSext / AssertZext nodes
>
> -Matt
>
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2007 Aug 09
1
[LLVMdev] Tail call optimization thoughts
...s
not used (remove it from available
registers in callingconvention for argument passing?)
2.)lowering of the call:
*if it can be shown that call really is tail call (next
instruction is a return):
-move the arguments to the correct position on the stack
-create a REALTAILCALL SelDAG node holding
tailcallee : if the tailcallee is dynamic, not a
TargetGlobalAddress or the like,
lower a move CALL_CLOBBERED_REG tailcallee instruction else
attach a
TargetGlobalAddress or the like
-the size of the stack adjustment
the realtailcall would be a n...
2013 Aug 22
0
[LLVMdev] [NEW PATCH] X32 ABI support for Clang/compiler-rt (Clang patch)
On Thu, 2013-08-22 at 15:22 +0100, Steven Newbury wrote:
> This patch is still not creating elf32_x86_64 objects. No idea
> why. :( It does however, fix elf_x86_64 (-m64) code generation on x32
> hosts which is nice. :)
I know why. I had assumed Michael Liao (the original patch author) had
submitted all the _LLVM_ x32 support as separate patches, and it was
just the
2013 Aug 22
3
[LLVMdev] [NEW PATCH] X32 ABI support for Clang/compiler-rt (Clang patch)
This patch is still not creating elf32_x86_64 objects. No idea
why. :( It does however, fix elf_x86_64 (-m64) code generation on x32
hosts which is nice. :)
--- ./tools/clang/include/clang/Driver/Options.td.orig 2013-05-16
21:51:51.286129820 +0000
+++ ./tools/clang/include/clang/Driver/Options.td 2013-05-16
21:53:24.875004239 +0000
@@ -841,6 +841,7 @@
HelpText<"Enable hexagon-qdsp6