Displaying 7 results from an estimated 7 matches for "segment_regist".
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segment_register
2012 Sep 11
0
[PATCH 1/3] x86/hvm: don't use indirect calls without need
...or_interrupt(struct cpu_user_reg
void pmu_apic_interrupt(struct cpu_user_regs *regs)
{
ack_APIC_irq();
- hvm_do_pmu_interrupt(regs);
+ vpmu_do_interrupt(regs);
}
/*
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -73,6 +73,8 @@ bool_t cpu_has_lmsl;
#define set_segment_register(name, value) \
asm volatile ( "movw %%ax ,%%" STR(name) "" : : "a" (value) )
+static void svm_update_guest_efer(struct vcpu *);
+
static struct hvm_function_table svm_function_table;
/* va of hardware host save area */
@@ -269,9 +271,9 @@ static int s...
2010 Aug 05
3
[PATCH 08/14] Nested Virtualization: efer
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
--
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
_______________________________________________
Xen-devel mailing list
2011 Nov 30
0
[PATCH 4/4] x86/emulator: cleanup
..._prefix() && !(_regs.eflags & EFLG_ZF)) ||
+ (repne_prefix() && (_regs.eflags & EFLG_ZF)) )
_regs.eip = next_eip;
break;
}
@@ -4076,7 +4077,7 @@ x86_emulate(
case 0x35: /* sysexit */ {
uint64_t msr_content;
struct segment_register cs, ss;
- int user64 = !!(rex_prefix & 8); /* REX.W */
+ bool_t user64 = !!(rex_prefix & REX_W);
int rc;
generate_exception_if(!mode_ring0(), EXC_GP, 0);
@@ -4366,7 +4367,7 @@ x86_emulate(
: "=r" (dst.val), "=q" (zf)...
2008 Apr 21
1
[PATCH] x86-64: emulation support for cmpxchg16b
...ulate/x86_emulate.h
===================================================================
--- 2008-04-15.orig/xen/arch/x86/x86_emulate/x86_emulate.h 2008-04-01 11:10:21.000000000 +0200
+++ 2008-04-15/xen/arch/x86/x86_emulate/x86_emulate.h 2008-04-15 08:48:15.000000000 +0200
@@ -104,8 +104,9 @@ struct segment_register {
* some out-of-band mechanism, unknown to the emulator. The memop signals
* failure by returning X86EMUL_EXCEPTION to the emulator, which will
* then immediately bail.
- * 2. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
- * cmpxchg8b_emulated need sup...
2013 Jun 04
12
[PATCH 0/4] XSA-52..54 follow-up
The first patch really isn''t as much of a follow-up than what triggered
the security issues to be noticed in the first place.
1: x86: preserve FPU selectors for 32-bit guest code
2: x86: fix XCR0 handling
3: x86/xsave: adjust state management
4: x86/fxsave: bring in line with recent xsave adjustments
The first two I would see as candidates for 4.3 (as well as
subsequent backporting,
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh
Rathor at Oracle. The entirety of the design and development was done
by him; I have only reworked, reorganized, and simplified things in a
way that I think makes more sense. The vast majority of the credit
for this effort therefore goes to him. This version is labelled v13
because it is based on his most recent series, v11.
2013 Aug 22
9
[PATCH v3 0/4] Nested VMX: APIC-v related bug fixing
From: Yang Zhang <yang.z.zhang@Intel.com>
The following patches fix the issue that fail to boot L2 guest on APIC-v
available machine. The main problem is that with APIC-v, virtual interrupt inject
L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running,
L1 will detect interrupt through vmexit with reason external interrupt. If this happens,
we should update