search for: secboot

Displaying 20 results from an estimated 135 matches for "secboot".

2017 Jul 04
2
[PATCH] secboot/acr352: reset PMU after secboot
This is needed for using Nouveaus PMU image after performing secboot. This will be helpfull for Maxwell2 reclocking on boards without externally controlled fans like on most laptops or fanless boards. Signed-off-by: Karol Herbst <karolherbst at gmail.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) dif...
2018 Jul 24
2
[PATCH] drm/nouveau/secboot/acr: fix memory leak
In case memory resources for *bl_desc* were allocated, release them before return. Addresses-Coverity-ID: 1472021 ("Resource leak") Fixes: 0d466901552a ("drm/nouveau/secboot/acr: Remove VLA usage") Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/sub...
2016 Jun 08
4
[PATCH 0/4] secboot: be more resilient on errors
...re boot function is invoked, also addressing the case where firmware is not available at the time of boot (the first GR init attempt will fail, but the next one will succeed provided the files are now available). Ben, I know we discussed solving problem 2) by moving firmware loading into the secboot constructor, but this is impossible due to the fact firmware loading requires the creation of gpuobj, a feature that is not available at that time. For this reason I have adopted this lazy and actually more resilient strategy. Alexandre Courbot (4): secboot: fix kerneldoc for secure boot structu...
2018 Jun 10
2
[PATCH] drm: nouveau: Enable gp20b/gp10b firmware tag when relevant
This allows to have the related MODULE_FIRMWARE tag only on relevant arch (arm64). This will saves about 400k on initramfs when not relevant Signed-off-by: Nicolas Chauvet <kwizart at gmail.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c index 30491d132d59..df8b919dcf09 100644 --- a/drivers/gpu/drm/nouveau/...
2016 Oct 11
0
[PATCH 0/8] Secure Boot refactoring
...ed in a single file, with no data structures > shared > with acr_v1.c. The gm20b_acr_v1_ls_func variable also describes clearly > what > LS firmwares are to be loaded and how. > > Alexandre Courbot (8): > core: constify nv*_printk macros > core: add falcon library > secboot: use falcon library's IMEM/DMEM loading functions > secboot: rename init() hook to oneinit() > secboot: move ACR building logic into own source files > secboot: remove fixup_hs_desc hook > secboot: add low-secure firmware hooks > secboot: generate HS BL descriptor in ho...
2016 Nov 02
0
[PATCH v3 12/15] secboot: remove unneeded ls_ucode_img member
ucode_header is not used anywhere, so just get rid of it. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 25 +++++++------------------ drm/nouveau/nvkm/subdev/secboot/ls_ucode.h | 2 -- drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c | 2 -- 3 files changed, 7 insertions(+), 22 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drm/nouveau/nvkm/subdev/secboot/ac...
2018 Sep 08
2
[PATCH] drm/nouveau/secboot/acr: fix memory leak
...gt; Gustavo > > On 07/24/2018 08:27 AM, Gustavo A. R. Silva wrote: >> In case memory resources for *bl_desc* were allocated, release >> them before return. >> >> Addresses-Coverity-ID: 1472021 ("Resource leak") >> Fixes: 0d466901552a ("drm/nouveau/secboot/acr: Remove VLA usage") >> Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> >> --- >> drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/...
2018 May 24
3
[PATCH] drm/nouveau/secboot/acr: Remove VLA usage
...9;t abort in the middle. This needs an initial walk of the lists to figure out how large the buffer should be. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA at mail.gmail.com Signed-off-by: Kees Cook <keescook at chromium.org> --- .../nouveau/nvkm/subdev/secboot/acr_r352.c | 25 ++++++++++++++++--- .../nouveau/nvkm/subdev/secboot/acr_r367.c | 16 +++++++++++- 2 files changed, 37 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index a721354249ce...
2017 Jul 05
0
[PATCH] secboot/acr352: reset PMU after secboot
On 07/05/2017 03:35 AM, Karol Herbst wrote: > This is needed for using Nouveaus PMU image after performing secboot. This will > be helpfull for Maxwell2 reclocking on boards without externally controlled > fans like on most laptops or fanless boards. I get the idea in principal, but have some concerns: - Does this screw up re-running secboot during channel recovery (ie. page fault on gr)? - What about th...
2017 Mar 29
15
[PATCH 00/15] Support for GP10B chipset
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot: let LS post...
2016 Mar 09
1
[PATCH 1/2] secboot: don't use hardcoded mask to enable falcon
The IRQ mask of the PMU falcon was left - replace it with the proper irq_mask variable. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/base.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/secboot/base.c b/drm/nouveau/nvkm/subdev/secboot/base.c index b718ba79177c..05c62549c39b 100644 --- a/drm/nouveau/nvkm/subdev/secboot/base.c +++ b/drm/nouveau/nvkm/subdev/secboot/base.c @@ -85,8 +...
2020 Jan 08
1
[PATCH] nouveau/secboot/gm20b: initialize pointer in gm20b_secboot_new()
We accidentally set "psb" which is a no-op instead of "*psb" so it generates a static checker warning. We should probably set it before the first error return so that it's always initialized. Fixes: 923f1bd27bf1 ("drm/nouveau/secboot/gm20b: add secure boot support") Signed-off-by: Dan Carpenter <dan.carpenter at oracle.com> --- Static analysis. I'm not sure how this is called. drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gp...
2018 Mar 13
2
[PATCH] drm/nouveau/secboot: remove VLA usage
...LA can get. Thus, we can end up having runtime failures that are hard to debug. Also, fixed as part of the directive to remove all VLAs from the kernel: https://lkml.org/lkml/2018/3/7/621 Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ls_ucode_msgqueue.c index 6f10b09..2da147b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/s...
2019 Sep 17
2
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...registers that can be used to read the > WPR configuration. Use these registers instead of reaching into the > memory controller's register space to read the same information. > > Signed-off-by: Thierry Reding <treding at nvidia.com> > --- > .../drm/nouveau/nvkm/subdev/secboot/gm200.h | 2 +- > .../drm/nouveau/nvkm/subdev/secboot/gm20b.c | 81 ++++++++++++------- > .../drm/nouveau/nvkm/subdev/secboot/gp10b.c | 4 +- > 3 files changed, 53 insertions(+), 34 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h b/drivers/gp...
2016 Sep 23
1
[PATCH] drm/nouveau/secboot/gm20b: Fix return value in case of error
..._wpr()' will return 0 as well, which means success. Return -ENOMEM instead Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr> --- Not sure that -ENOMEM is the best value. I've taken it because it is often used in such a case. --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c index d5395ebfe8d3..d88db933b3fd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c +++ b/drivers/gpu/d...
2019 Sep 16
0
[PATCH 03/11] drm/nouveau: secboot: Read WPR configuration from GPU registers
...GPUs found on Tegra SoCs have registers that can be used to read the WPR configuration. Use these registers instead of reaching into the memory controller's register space to read the same information. Signed-off-by: Thierry Reding <treding at nvidia.com> --- .../drm/nouveau/nvkm/subdev/secboot/gm200.h | 2 +- .../drm/nouveau/nvkm/subdev/secboot/gm20b.c | 81 ++++++++++++------- .../drm/nouveau/nvkm/subdev/secboot/gp10b.c | 4 +- 3 files changed, 53 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h b/drivers/gpu/drm/nouveau/nvkm/subde...
2018 Jun 11
1
[PATCH] drm: nouveau: Enable gp20b/gp10b firmware tag when relevant
...gt; This allows to have the related MODULE_FIRMWARE tag only >> on relevant arch (arm64). >> This will saves about 400k on initramfs when not relevant >> >> Signed-off-by: Nicolas Chauvet <kwizart at gmail.com> >> --- >> drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 ++ >> drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c | 2 ++ >> 2 files changed, 4 insertions(+) >> >> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c >> index 30491d132d59..df8b91...
2016 Dec 14
18
[PATCH v5 0/18] Secure Boot refactoring
Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA firmware...
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
...stractions to firmware loading functions - Optimized set of abstractions - Removed some more code Changes since v2: - Fix naming of new structures/functions Changes since v3: - Add PMU support code for GM20B. Alexandre Courbot (31): core: constify nv*_printk macros core: add falcon library secboot: use falcon library's IMEM/DMEM loading functions secboot: rename init() hook to oneinit() secboot: remove fixup_hs_desc hook secboot: add low-secure firmware hooks secboot: generate HS BL descriptor in hook secboot: reorganize into more files secboot: add LS flags to LS func struct...
2016 Nov 02
0
[PATCH v3 10/15] secboot: split reset function
Split the reset function into more meaningful and reusable ones. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 3 ++ drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 78 ++++++++++++++++++++---------- 2 files changed, 56 insertions(+), 25 deletions(-) diff --git a/drm/nouveau/include/nvkm/subdev/secboot.h b/drm/nouveau/include/nvkm/subdev/secboot.h index 24d98878bb93..785e2c553392 100644 --- a/drm/nouvea...