search for: sduses

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2010 Feb 24
2
[LLVMdev] SDUse
I just found a major bug in SelectionDAG. Well, I found it several weeks ago and finally diagnosed it today. One possible fix comes down to holding SDUses about to be processed in a queue. But this would require the SDUse copy constructor to be public. Why is it private and unimplemented right now? What's the assumption that's trying to protect? -Dave
2010 Feb 25
0
[LLVMdev] SDUse
...uldn't immediately break anything, but it wouldn't be meaningful. Dan On Feb 24, 2010, at 3:08 PM, David Greene wrote: > I just found a major bug in SelectionDAG. Well, I found it several weeks ago > and finally diagnosed it today. > > One possible fix comes down to holding SDUses about to be processed in > a queue. But this would require the SDUse copy constructor to be public. > > Why is it private and unimplemented right now? What's the assumption > that's trying to protect? > > -Dave > > _________...
2010 Feb 25
0
[LLVMdev] [PATCH] Debug SelectionDAG & SDUse
...caused by either garbled data or assigning an SDUse to multiple SDNode use lists. I don't know what the root cause of the asserts is right now. In our copy of 2.5, we get asserts about referencing singular iterators in ReplaceAllUsesWith. The problem appears to be the recursive call deleting SDUses out from under the iterators. I have not got that far on trunk due to the other assert failures. Three things that I'd like to request: 1. Someone to review that I've correctly made the data structure change. 2. Someone to apply the patch to their local tree and run a Debug+Checks test...
2010 Feb 25
2
[LLVMdev] SDUse
On Wednesday 24 February 2010 18:47:19 Dan Gohman wrote: > SDUse's Prev and Next members implement a use list. Copying them > probably wouldn't immediately break anything, but it wouldn't be > meaningful. I understand that the copied SDUse wouldn't be represented in the list, so I can understand the general reasons for making the copy constructor private. In this case,
2010 Feb 25
0
[LLVMdev] SDUse Lists
Are SDUses ever allowed to be part of more than one list? I would think not due to the intrusive nature of the list links. However, this is what I am seeing with some testcases on trunk. I am putting together a patch that shows these kinds of problems in XDEBUG mode. I'll post it ASAP....
2010 Feb 26
4
[LLVMdev] Massive Number of Test Failures
On Feb 25, 2010, at 2:24 PM, David Greene wrote: > On Thursday 25 February 2010 16:17:10 David Greene wrote: >> On Thursday 25 February 2010 16:07:59 Chris Lattner wrote: >>> On Feb 25, 2010, at 12:01 PM, David Greene wrote: >>>> I am seeing a whole lot of failures in the tests on trunk. From >>>> discussions with Chris and others, I should not be seeing
2013 Aug 23
1
[LLVMdev] Incredible effects of extending AtomicSDNode::Ops
Hello, As part of enhancing atomic operations in the ARM backend, we need to extend the Ops array in AtomicSDNode. This array is a private member of AtomicSDNode, so it's only accessible within 85 lines of code, none of which have anything to do with its size. Therefore, increasing the size of Ops shouldn't at all affect the behaviour of LLVM, we supposed. Much to our surprise, this
2015 Aug 17
4
Aggregate load/stores
Even if I turn to -O0 [in other words, no optimisation passes at all], it takes the same amount of time. The time is spent in 12.94% lacsap lacsap [.] llvm::SDNode::use_iterator::operator== 7.68% lacsap lacsap [.] llvm::SDNode::use_iterator::operator* 7.53% lacsap lacsap [.] llvm::SelectionDAG::ReplaceAllUsesOfValueWith 7.28% lacsap
2010 Feb 26
0
[LLVMdev] Massive Number of Test Failures
On Thursday 25 February 2010 20:20:56 Dan Gohman wrote: Wrong thread? > SDUse::setInitial should initialize List to null in your patch. You're > probably seeing random uninitialized data noise without that. > (Though valgrind wouldn't notice this because of the aggressive reuse > of allocated memory.) Why isn't the default constructor called? I would have expected that
2010 Mar 01
2
[LLVMdev] [PATCH] SelectionDAG Debug
Just so this doesn't get lost in threads dealing with SelectionDAG issues, I'd like to post this patch for review. It changes the SDUse list from an intrusive list to a std::list<> under XDEBUG. This allows us to use the debugging features of the standard library to track down stubborn bugs. I've used this to diagnose in issue in SelectionDAG in our sources and also in the
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello. I fixed the bug reported in the previous post on this thread (<<llvm::MemSDNode::MemSDNode(unsigned int, unsigned int, const llvm::DebugLoc&, llvm::SDVTList, llvm::EVT, llvm::MachineMemOperand*): Assertion `memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!"' failed.>>) The problem with this strange error reported comes from
2009 Jan 19
2
[LLVMdev] HazardRecognizer and RegisterAllocation
Hi list, in our LLVM-based-project we are writing a backend for our processor. The architecture is a quite straight-forward RISC, but it does not have hardware interlocks, i.e. data hazards involving memory access must be resolved by the compiler, either by scheduling unrelated instructions or by inserting NOOPs into the load delay slots: ---- For example, code which looks like that: load
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello. I wanted to inform that I fixed the bug from the previous email. The main reason for the bug was that I thought that the SDNode masked_gather is returning only 1 value, but it returns 2 (hence, I guess, the earlier reported, difficult to follow, error: "Assertion `New->getNumTypes() == 1"). masked_gather returns 2 values because: // SDTypeProfile -
2010 Feb 26
0
[LLVMdev] Massive Number of Test Failures
On Feb 25, 2010, at 6:20 PM, Dan Gohman wrote: > > On Feb 25, 2010, at 2:24 PM, David Greene wrote: > >> On Thursday 25 February 2010 16:17:10 David Greene wrote: >>> On Thursday 25 February 2010 16:07:59 Chris Lattner wrote: >>>> On Feb 25, 2010, at 12:01 PM, David Greene wrote: >>>>> I am seeing a whole lot of failures in the tests on trunk.
2010 Mar 02
0
[LLVMdev] [PATCH] SelectionDAG Debug
Do you have a fix for the blackfin codegen? That would be a great way to motivate this patch. Otherwise, at a glance, it appears you fixed the issues I raised, so this is fine, if it catches real bugs. Dan On Mar 1, 2010, at 10:02 AM, David Greene wrote: > Just so this doesn't get lost in threads dealing with SelectionDAG > issues, I'd like to post this patch for review. It
2009 Jan 19
0
[LLVMdev] HazardRecognizer and RegisterAllocation
On Jan 19, 2009, at 9:17 AM, Patrick Boettcher wrote: > Hi list, > > in our LLVM-based-project we are writing a backend for our > processor. The > architecture is a quite straight-forward RISC, but it does not have > hardware interlocks, i.e. data hazards involving memory access must be > resolved by the compiler, either by scheduling unrelated > instructions or >
2010 Feb 25
0
[LLVMdev] Massive Number of Test Failures
On Thursday 25 February 2010 16:17:10 David Greene wrote: > On Thursday 25 February 2010 16:07:59 Chris Lattner wrote: > > On Feb 25, 2010, at 12:01 PM, David Greene wrote: > > > I am seeing a whole lot of failures in the tests on trunk. From > > > discussions with Chris and others, I should not be seeing this. > > > > Does 'make check-lit' pass for
2010 Feb 25
3
[LLVMdev] Massive Number of Test Failures
On Thursday 25 February 2010 16:07:59 Chris Lattner wrote: > On Feb 25, 2010, at 12:01 PM, David Greene wrote: > > I am seeing a whole lot of failures in the tests on trunk. From > > discussions with Chris and others, I should not be seeing this. > > Does 'make check-lit' pass for you in llvm/test? Nope. In fact I am seeing more failures in debug mode now. But what
2016 Jan 25
2
Instruction selection gives "LLVM ERROR: Cannot select"
Hello. I'm writing a back end for a RISC processor (similar to BPF) with a large SIMD unit. I tried in the last days to make llc compile to SIMD code the following LLVM program: define i32 @foo(i32* %A, i32* %B, i32* %C, i32 %N) #0 { entry: ;vector.body: ; preds = %vector.body, %vector.body.preheader.split.split %0 = getelementptr inbounds i32, i32* %A, i64 0 ; i64 %index ; Alex: I
2016 Feb 04
2
llc gives Segmentation fault at instruction selection [was Re: Instruction selection gives "LLVM ERROR: Cannot select"]
Hello, Tim, Thank you for your advice. Indeed, the problem with "LLVM ERROR: Cannot select" was a false predicate that should have been true. I solved the problem by simply making the C++ function implementing the TableGen predicate used in my store instruction (very similar to the selectIntAddrMSA predicate from the Mips back end) return true instead of false. But