Displaying 8 results from an estimated 8 matches for "sdtypeconstraint".
2019 Nov 20
4
Tablegen PAT limitation?
...ork/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:826:0
#9 0x00000000004808bd llvm::TypeInfer::EnforceSmallerThan(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&) /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:455:0
#10 0x000000000048860f llvm::SDTypeConstraint::ApplyTypeConstraint(llvm::TreePatternNode*, llvm::SDNodeInfo const&, llvm::TreePattern&) const /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:1506:0
#11 0x00000000004a780b llvm::SDNodeInfo::ApplyTypeConstraints(llvm::TreePatternNode*, llvm::TreePattern&am...
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...rtion `New->getNumTypes() == 1").
masked_gather returns 2 values because:
// SDTypeProfile - This profile describes the type requirements of a Selection
// DAG node.
class SDTypeProfile<int numresults, int numoperands,
list<SDTypeConstraint> constraints> {
int NumResults = numresults;
int NumOperands = numoperands;
list<SDTypeConstraint> Constraints = constraints;
}
// So: 2 results, 3 operands.
// Params are: passthru, mask, index; results are: vector of i1, p...
2019 Nov 21
2
Tablegen PAT limitation?
...ang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:826:0
#9 0x00000000004808bd llvm::TypeInfer::EnforceSmallerThan(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&) /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:455:0
#10 0x000000000048860f llvm::SDTypeConstraint::ApplyTypeConstraint(llvm::TreePatternNode*, llvm::SDNodeInfo const&, llvm::TreePattern&) const /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:1506:0
#11 0x00000000004a780b llvm::SDNodeInfo::ApplyTypeConstraints(llvm::TreePatternNode*, llvm::TreePattern&a...
2016 Dec 19
1
Specs on TableGen Instruction fields: pattern, ins and outs
Hello.
Are you aware of any document (preferably academic paper) describing TableGen's
typing of the following fields used to describe Instruction: pattern, ins and outs.
I found a few pages on TableGen, but none of them talking about these fields:
http://llvm.org/docs/TableGen/LangRef.html
http://llvm.org/docs/TableGen/LangIntro.html
2019 Nov 22
2
Tablegen PAT limitation?
...ang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:826:0
#9 0x00000000004808bd llvm::TypeInfer::EnforceSmallerThan(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&) /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:455:0
#10 0x000000000048860f llvm::SDTypeConstraint::ApplyTypeConstraint(llvm::TreePatternNode*, llvm::SDNodeInfo const&, llvm::TreePattern&) const /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:1506:0
#11 0x00000000004a780b llvm::SDNodeInfo::ApplyTypeConstraints(llvm::TreePatternNode*, llvm::TreePattern&a...
2019 Nov 25
2
Tablegen PAT limitation?
...ang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:826:0
#9 0x00000000004808bd llvm::TypeInfer::EnforceSmallerThan(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&) /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:455:0
#10 0x000000000048860f llvm::SDTypeConstraint::ApplyTypeConstraint(llvm::TreePatternNode*, llvm::SDNodeInfo const&, llvm::TreePattern&) const /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:1506:0
#11 0x00000000004a780b llvm::SDNodeInfo::ApplyTypeConstraints(llvm::TreePatternNode*, llvm::TreePattern&a...
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...es() == 1").
>
> masked_gather returns 2 values because:
> // SDTypeProfile - This profile describes the type requirements of a Selection
> // DAG node.
> class SDTypeProfile<int numresults, int numoperands,
> list<SDTypeConstraint> constraints> {
> int NumResults = numresults;
> int NumOperands = numoperands;
> list<SDTypeConstraint> Constraints = constraints;
> }
>
> // So: 2 results, 3 operands.
> // Params are: passthru, mask, index;...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have
to say that the definition of the "multiclass avx512_gather" from
lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it.
I currently have some serious problems with TableGen - it gives an assertion failure: