Displaying 4 results from an estimated 4 matches for "sdttestnode".
2013 Jan 04
2
[LLVMdev] TableGen patterns with multiple outputs
Are multi-output patterns in TableGen supposed to work, or is that a known
limitation in the current implementation?
If I have TableGen code like the following...
1242 def SDTTestNode : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>]>;
1243 def TestNode : SDNode<"NVPTXISD::TestNode", SDTTestNode>;
1244
1245 def MyTestNode : NVPTXInst<(outs Int32Regs:$dst0, Int32Regs:$dst1),
1246 (ins Int32Regs:$a),
1247...
2013 Jan 07
2
[LLVMdev] TableGen patterns with multiple outputs
...patterns in TableGen supposed to work, or is that a known
> limitation in the current implementation?
>
>
> It is a known limitation. You have to write C++ code to match patterns
> with multiple outputs.
>
>
> If I have TableGen code like the following...
>
> 1242 def SDTTestNode : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>]>;
> 1243 def TestNode : SDNode<"NVPTXISD::TestNode", SDTTestNode>;
> 1244
> 1245 def MyTestNode : NVPTXInst<(outs Int32Regs:$dst0, Int32Regs:$dst1),
> 1246 (ins Int32Regs:$a),
> 1247...
2013 Jan 07
0
[LLVMdev] TableGen patterns with multiple outputs
...e:
> Are multi-output patterns in TableGen supposed to work, or is that a known limitation in the current implementation?
It is a known limitation. You have to write C++ code to match patterns with multiple outputs.
>
> If I have TableGen code like the following...
>
> 1242 def SDTTestNode : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>]>;
> 1243 def TestNode : SDNode<"NVPTXISD::TestNode", SDTTestNode>;
> 1244
> 1245 def MyTestNode : NVPTXInst<(outs Int32Regs:$dst0, Int32Regs:$dst1),
> 1246 (ins Int32Regs:$a),
> 1247...
2013 Jan 07
0
[LLVMdev] TableGen patterns with multiple outputs
...rns in TableGen supposed to work, or is that a known limitation in the current implementation?
>
> It is a known limitation. You have to write C++ code to match patterns with multiple outputs.
>
>>
>> If I have TableGen code like the following...
>>
>> 1242 def SDTTestNode : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>]>;
>> 1243 def TestNode : SDNode<"NVPTXISD::TestNode", SDTTestNode>;
>> 1244
>> 1245 def MyTestNode : NVPTXInst<(outs Int32Regs:$dst0, Int32Regs:$dst1),
>> 1246 (ins Int32Reg...