Displaying 20 results from an estimated 159 matches for "sdoperand".
2006 May 05
2
[LLVMdev] ExecutionEngine blew the stack ?
...Attached is the assembly. It is the smallest example
generated that causes the segfault.
If this EE uses a recursive function (??), it seems an inherent limitation
in how big llvm functions can be.
Simon.
gdb backtrace:
#0 0x40b126a3 in (anonymous namespace)::X86DAGToDAGISel::Select_store(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660,
Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at X86GenDAGISel.inc:19768
#1 0x40b01b44 in (anonymous namespace)::X86DAGToDAGISel::SelectCode(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660,
Result=@0xbf800a10, N={Val = 0x8254338, ResNo...
2006 Dec 19
3
[LLVMdev] alias-aware scheduling
Hello,
I did a little experiment modifying LLVM to be able to use alias-analysis
information in scheduling so that independent memory operations may be
reordered.
Attached is a patch which implements this. I copied some routines from
DAGCombiner.cpp for using SDOperands with alias queries; it should
probably be factored out somewhere so the code can be shared. I
reorganized SelectionDAGLowering::getLoadFrom a little, to make it
simpler to use in other contexts.
Also, the patch fixes a bug where SelectionDAG::getLoad and
SelectionDAG::getStore were being called w...
2007 Sep 24
2
[LLVMdev] RFC: Tail call optimization X86
...t; Index: include/llvm/Target/TargetLowering.h
> ===================================================================
> --- include/llvm/Target/TargetLowering.h (revision 42247)
> +++ include/llvm/Target/TargetLowering.h (working copy)
> @@ -851,8 +851,18 @@
> virtual std::pair<SDOperand, SDOperand>
> LowerCallTo(SDOperand Chain, const Type *RetTy, bool
> RetTyIsSigned,
> bool isVarArg, unsigned CallingConv, bool isTailCall,
> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
> + bool isNextInstRet, SD...
2006 Nov 15
2
[LLVMdev] LowerCALL (TargetLowering)
...s map a CALL instruction directly onto an SDNode that
takes an equal number of arguments (very much alike intrinsics, except
that these are custom to my target.) I do not need to implement any call
sequences, stack frames etc.
I get the following assertion failure:
llc: LegalizeDAG.cpp:834: llvm::SDOperand <unnamed>::SelectionDAGLegalize::LegalizeOp(llvm::SDOperand): Assertion `Tmp3.Val->getNumValues() == Result.Val->getNumValues() && "Lowering call/formal_arguments produced unexpected # results!"' failed.
This is what my LowerCALL looks like:
SDOperand MCTargetLow...
2006 May 05
0
[LLVMdev] ExecutionEngine blew the stack ?
...Attached is the assembly. It is the smallest example
generated that causes the segfault.
If this EE uses a recursive function (??), it seems an inherent limitation
in how big llvm functions can be.
Simon.
gdb backtrace:
#0 0x40b126a3 in (anonymous namespace)::X86DAGToDAGISel::Select_store(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660,
Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at X86GenDAGISel.inc:19768
#1 0x40b01b44 in (anonymous namespace)::X86DAGToDAGISel::SelectCode(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660,
Result=@0xbf800a10, N={Val = 0x8254338, ResNo...
2008 Apr 21
0
[LLVMdev] RFC: PowerPC tail call optimization patch
...=
DAG.getMachineFunction().getInfo<PPCFunctionInfo>();
+ unsigned CallerMinReservedArea = FI->getMinReservedArea();
+ SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
Just change last statement to
int SPDiff = (int)...
+bool
+PPCTargetLowering::IsEligibleForTailCallOptimization(SDOperand Call,
+ SDOperand Ret,
+ SelectionDAG&
DAG) const {
+ // Variable argument functions
+ // are not supported.
Why two separate lines?
+ if (!PerformTailCallOpt ||
+ cast<Constan...
2008 Apr 22
2
[LLVMdev] RFC: PowerPC tail call optimization patch
...apple.com> wrote:
> More nitpicks:
> ...
> No need for else here. :-)
Done
> SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
>
> Just change last statement to
> int SPDiff = (int)...
Done
>
> +bool
> +PPCTargetLowering::IsEligibleForTailCallOptimization(SDOperand Call,
> + SDOperand Ret,
> + SelectionDAG&
> DAG) const {
> + // Variable argument functions
> + // are not supported.
>
> Why two separate lines?
there once was...
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...lvm/Target/TargetLowering.h
>> ===================================================================
>> --- include/llvm/Target/TargetLowering.h (revision 42247)
>> +++ include/llvm/Target/TargetLowering.h (working copy)
>> @@ -851,8 +851,18 @@
>> virtual std::pair<SDOperand, SDOperand>
>> LowerCallTo(SDOperand Chain, const Type *RetTy, bool
>> RetTyIsSigned,
>> bool isVarArg, unsigned CallingConv, bool isTailCall,
>> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
>> + bool i...
2006 Dec 20
1
[LLVMdev] alias-aware scheduling
...chain operands during the construction
of the DAG, while the DAGCombiner code works by cleaning up chain operands in
a separate pass. It looks like the end result is pretty similar.
> > Attached is a patch which implements this. I copied some routines from
> > DAGCombiner.cpp for using SDOperands with alias queries; it should
> > probably be factored out somewhere so the code can be shared. I
> > reorganized SelectionDAGLowering::getLoadFrom a little, to make it
> > simpler to use in other contexts.
> >
> > Also, the patch fixes a bug where SelectionDAG::getLo...
2007 Sep 25
2
[LLVMdev] RFC: Tail call optimization X86
...>> ===================================================================
> >> --- include/llvm/Target/TargetLowering.h (revision 42247)
> >> +++ include/llvm/Target/TargetLowering.h (working copy)
> >> @@ -851,8 +851,18 @@
> >> virtual std::pair<SDOperand, SDOperand>
> >> LowerCallTo(SDOperand Chain, const Type *RetTy, bool
> >> RetTyIsSigned,
> >> bool isVarArg, unsigned CallingConv, bool isTailCall,
> >> - SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
> >&...
2008 Apr 16
2
[LLVMdev] RFC: PowerPC tail call optimization patch
Hello Dale,
this is an updated version of the tail call optimization patch for
powerpc. could you have a look at it?
i added code to support ppc64 (untested, will try to get access to
ppc64 on a friend's machine).
incorporated evan's formatting suggestions. ;)
will run another round of testing (llvm-test) on my powerpc g4/800
when i get the okay to commit. testing on this machine takes
2006 Nov 15
0
[LLVMdev] LowerCALL (TargetLowering)
...e
> that
> takes an equal number of arguments (very much alike intrinsics, except
> that these are custom to my target.) I do not need to implement any
> call
> sequences, stack frames etc.
>
> I get the following assertion failure:
>
> llc: LegalizeDAG.cpp:834: llvm::SDOperand
> <unnamed>::SelectionDAGLegalize::LegalizeOp(llvm::SDOperand):
> Assertion `Tmp3.Val->getNumValues() == Result.Val->getNumValues()
> && "Lowering call/formal_arguments produced unexpected # results!"'
> failed.
>
> This is what my LowerCA...
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...llustrate with an example?
Index: include/llvm/Target/TargetLowering.h
===================================================================
--- include/llvm/Target/TargetLowering.h (revision 42247)
+++ include/llvm/Target/TargetLowering.h (working copy)
@@ -851,8 +851,18 @@
virtual std::pair<SDOperand, SDOperand>
LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned,
bool isVarArg, unsigned CallingConv, bool isTailCall,
- SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
+ bool isNextInstRet, SDOperand Callee, ArgListTy &...
2006 May 05
1
[LLVMdev] ExecutionEngine blew the stack ?
...; generated that causes the segfault.
>
> If this EE uses a recursive function (??), it seems an inherent
> limitation
> in how big llvm functions can be.
>
> Simon.
>
> gdb backtrace:
> #0 0x40b126a3 in (anonymous
> namespace)::X86DAGToDAGISel::Select_store(llvm::SDOperand&,
> llvm::SDOperand) (this=0x822d660,
> Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at
> X86GenDAGISel.inc:19768
> #1 0x40b01b44 in (anonymous namespace)::X86DAGToDAGISel::SelectCode
> (llvm::SDOperand&, llvm::SDOperand) (this=0x822d660,
> Result=@0xb...
2007 Sep 23
2
[LLVMdev] RFC: Tail call optimization X86
The patch is against revision 42247.
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2006 Dec 14
3
[LLVMdev] ThisCall / Compilation problems
...would
like to contribute to the project).
Also, I'm using MS Visual C++ Express, and there are a few things that stop
llvm1.9 (and the current CVS release) from compiling
correctly - once again, not sure how to submit, but here are the main things
-
In SelectionDAGNodes.h
StoreSDNode(SDOperand Chain, SDOperand Value, SDOperand Ptr,
SDOperand Off,
ISD::MemOpAddrMode AM, bool isTrunc, MVT::ValueType SVT,
const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
SDOperand Value should really be SDOperand value (lower case), since Value
is already a defined cla...
2008 Sep 08
0
[LLVMdev] adde/addc
...dded the following code to my target to do
the expansion:
ExpandADDSUB(SDNode *N, SelectionDAG &DAG)
{
assert(N->getValueType(0) == MVT::i64 &&
(N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB) &&
"Unknown operand to lower!");
// Extract components
SDOperand LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
N->getOperand(0),
DAG.getConstant(0, MVT::i32));
SDOperand LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
N->getOperand(0),
DAG.getConstant(1, MVT::i32));
SDOperand RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32,
N->getOperand(1)...
2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...TAILCALL,
/// TC_RETURN - A tail call return.
@@ -325,10 +326,6 @@
SelectionDAG &DAG) const;
private:
- /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels.
- ///
- unsigned PPCAtomicLabelIndex;
-
SDOperand getFramePointerFrameIndex(SelectionDAG & DAG) const;
SDOperand getReturnAddrFrameIndex(SelectionDAG & DAG) const;
Index: lib/Target/PowerPC/PPCInstr64Bit.td
===================================================================
--- lib/Target/PowerPC/PPCInstr64Bit.td (revision 52957)
++...
2008 Apr 22
0
[LLVMdev] RFC: PowerPC tail call optimization patch
...:
>> ...
>> No need for else here. :-)
> Done
>> SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
>>
>> Just change last statement to
>> int SPDiff = (int)...
> Done
>>
>> +bool
>> +PPCTargetLowering::IsEligibleForTailCallOptimization(SDOperand Call,
>> + SDOperand Ret,
>> + SelectionDAG&
>> DAG) const {
>> + // Variable argument functions
>> + // are not supported.
>>
>> Why two separate...
2007 Sep 11
0
[LLVMdev] RFC: Tail call optimization X86
...: TargetLowering(TM) {
+ IsLastCallTailCall = false;
This is probably not a good idea. You are assuming nodes are lowered
in certain order, that is dangerous. It's probably better to check
whether the last call is a tail call on the fly as you are processing
the return node.
8.
-
- SDOperand Chain = Op.getOperand(0);
- SDOperand Flag;
-
- // Copy the result values into the output registers.
- if (RVLocs.size() != 1 || !RVLocs[0].isRegLoc() ||
- RVLocs[0].getLocReg() != X86::ST0) {
- for (unsigned i = 0; i != RVLocs.size(); ++i) {
- CCValAssign &VA = RVLocs[i];
-...