search for: sdnpsideeffect

Hi, So, I have inserted some calls to my intrinsic functions in a pass but there are being removed. The purpose of the intrinsics are to increment a specific register, the intrinsic call is lowered to a node that i have defined with SDNPSideEffect and the instruction also is defined as 'hasSideEffects = 1'. I have defined the instruction to return a i32 but take no arguments. Is there any way to stop my instruction being deleted or do I need to define my intrinsic as taking a register as an argument? And if this is the case, how do I...

...ed. is it being deleted by the IR level optimizers or during code generation? Are you inserting it at IR level or during code generation? Ciao, Duncan. The purpose of the intrinsics are to increment a specific > register, the intrinsic call is lowered to a node that i have defined with > SDNPSideEffect and the instruction also is defined as 'hasSideEffects = 1'. > I have defined the instruction to return a i32 but take no arguments. Is > there any way to stop my instruction being deleted or do I need to define my > intrinsic as taking a register as an argument? And if this is the...

Hi guys, In X86ISelLowering.cpp I saw” ... case Intrinsic::x86_rdrand_16: case Intrinsic::x86_rdrand_32: …. case Intrinsic::x86_avx512_gather_qpd_512: case Intrinsic::x86_avx512_gather_qps_512: .. “ those intrinsics are handled by “LowerINTRINSIC_W_CHAIN”. How the “INTRINSIC_W_CHAIN” opCode is set instead of “INTRINSIC_WO_CHAIN”? tks Kevin -------------- next part -------------- An

...insic “int_x86_xtest: “ def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">, Intrinsic<[llvm_i32_ty], [], []>; “ "def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>, [SDNPHasChain, SDNPSideEffect]>; “ let Defs = [EFLAGS] in def XTEST : I<0x01, MRM_D6, (outs), (ins), "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>; which CALL makes the “Intrinsic::x86_xtest” is caught under “INTRINSIC_W_CHAIN”? feel I missed something, but did not figur...

...ot work like I assume. There must be something wrong. But I don't know it's because this trick does not work in theory or it's because my implementation is wrong. def MoveTy : SDTypeProfile<1, 1, []>; def MoveFlag : SDNode<"FOOISD::MOVE_FLAG", MoveTy, [SDNPHasChain, SDNPSideEffect, SDNPMayStore, SDNPMayLoad]>; let hasSideEffects = 1, mayStore = 1, mayLoad = 1 in { def MOVE : InstFOO<(outs ARegs:$dst), (ins BRegs:$src), "move $dst, $src", [(set i32:$dst, (MoveFlag i32:$src))]>; For example, I add this node into SDA...

...CT_XCC", SDTSPselectcc, [SDNPInGlue]>; def SPselectfcc : SDNode<"SPISD::SELECT_FCC", SDTSPselectcc, [SDNPInGlue]>; + def SPsjlj_setjmp: SDNode<"SPISD::EH_SJLJ_SETJMP", + SDTSPeh_sjlj_setjmp, + [SDNPHasChain, SDNPSideEffect]>; + def SPsjlj_longjmp: SDNode<"SPISD::EH_SJLJ_LONGJMP", + SDTSPeh_sjlj_longjmp, + [SDNPHasChain, SDNPSideEffect]>; + // These are target-independent nodes, but have target-specific formats. def SDT_SPCallSeqStart : SDCa...

Hi, I'm trying to implement __builtin_setjmp / __builtin_longjmp for Sparc processors. I think I'm very close, but I can't work out how to issue BuildMI-type instructions to load the address of the recovery location (set in setjmp) into a register using the SETHI / OR combination. I can't see any equivalent code anywhere else in Sparc. I imagine this is similar if I try to make a