Displaying 7 results from an estimated 7 matches for "sctrl".
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2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...iv, 0x4020, shader, &N, &M, &P1);
+ if (priv->csrc == nv_clk_src_core) {
+ out = calc_P((core << 1), shader, &divs);
+ }
+
+ if (abs(shader - out) <=
+ abs(shader - clock) &&
+ (divs + P2) <= 7) {
+ priv->ssrc = nv_clk_src_core;
+ priv->sctrl = (divs + P2) << 16;
+ } else {
+ priv->ssrc = nv_clk_src_shader;
+ priv->scoef = (N << 8) | M;
+ priv->sctrl = P1 << 16;
+ }
+ }
+
+ /* vclk */
+ out = calc_P(core, vdec, &divs);
+ clock = calc_P(500000, vdec, &P1);
+ if(abs(vdec - out) <=
+ abs(vde...
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...iv, 0x4020, shader, &N, &M, &P1);
+ if (priv->csrc == nv_clk_src_core) {
+ out = calc_P((core << 1), shader, &divs);
+ }
+
+ if (abs(shader - out) <=
+ abs(shader - clock) &&
+ (divs + P2) <= 7) {
+ priv->ssrc = nv_clk_src_core;
+ priv->sctrl = (divs + P2) << 16;
+ } else {
+ priv->ssrc = nv_clk_src_shader;
+ priv->scoef = (N << 8) | M;
+ priv->sctrl = P1 << 16;
+ }
+ }
+
+ /* vclk */
+ out = calc_P(core, vdec, &divs);
+ clock = calc_P(500000, vdec, &P1);
+ if(abs(vdec - out) <=
+ abs(vde...
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2010 Nov 01
5
[PATCH 03/10] staging: hv: Convert camel cased struct fields in hv.h to lower cases
...vContext.synICEventPage[cpu])
+ siefp.base_siefp_gpa = virt_to_phys(g_hv_context.synic_event_page[cpu])
>> PAGE_SHIFT;
DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.as_uint64);
@@ -449,15 +454,15 @@ void HvSynicInit(void *irqarg)
wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
- gHvContext.SynICInitialized = true;
+ g_hv_context.synic_initialized = true;
return;
Cleanup:
- if (gHvContext.synICEventPage[cpu])
- osd_PageFree(gHvContext.synICEventPage[cpu], 1);
+ if (g_hv_context.synic_event_page[cpu])
+ osd_PageFree(g_hv_context.synic_event_page[cpu],...
2010 Nov 01
5
[PATCH 03/10] staging: hv: Convert camel cased struct fields in hv.h to lower cases
...vContext.synICEventPage[cpu])
+ siefp.base_siefp_gpa = virt_to_phys(g_hv_context.synic_event_page[cpu])
>> PAGE_SHIFT;
DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.as_uint64);
@@ -449,15 +454,15 @@ void HvSynicInit(void *irqarg)
wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
- gHvContext.SynICInitialized = true;
+ g_hv_context.synic_initialized = true;
return;
Cleanup:
- if (gHvContext.synICEventPage[cpu])
- osd_PageFree(gHvContext.synICEventPage[cpu], 1);
+ if (g_hv_context.synic_event_page[cpu])
+ osd_PageFree(g_hv_context.synic_event_page[cpu],...
2010 Nov 01
24
[PATCH 01/10] staging: hv: Convert camel cased struct fields in channel_mgmt.h to lower cases
From: Haiyang Zhang <haiyangz at microsoft.com>
Convert camel cased struct fields in channel_mgmt.h to lower cases
Signed-off-by: Haiyang Zhang <haiyangz at microsoft.com>
Signed-off-by: Hank Janssen <hjanssen at microsoft.com>
---
drivers/staging/hv/channel.c | 302 ++++++++++++++++++------------------
drivers/staging/hv/channel_mgmt.c | 186 ++++++++++++------------
2010 Nov 01
24
[PATCH 01/10] staging: hv: Convert camel cased struct fields in channel_mgmt.h to lower cases
From: Haiyang Zhang <haiyangz at microsoft.com>
Convert camel cased struct fields in channel_mgmt.h to lower cases
Signed-off-by: Haiyang Zhang <haiyangz at microsoft.com>
Signed-off-by: Hank Janssen <hjanssen at microsoft.com>
---
drivers/staging/hv/channel.c | 302 ++++++++++++++++++------------------
drivers/staging/hv/channel_mgmt.c | 186 ++++++++++++------------