Displaying 20 results from an estimated 36 matches for "sclk".
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scl
2017 Sep 06
2
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...au/nvkm/subdev/clk/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
index 96e0941c8edd..04b4f4ccf186 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
@@ -130,10 +130,10 @@ read_pll(struct gt215_clk *clk, int idx, u32 pll)
sclk = read_clk(clk, 0x10 + idx, false);
}
- if (M * P)
- return sclk * N / (M * P);
+ if (M * P == 0)
+ return 0;
- return 0;
+ return sclk * N / (M * P);
}
static int
--
2.9.0
2014 Aug 21
0
[PATCH 2/7] clock/nva3: Set PLL refclk
...k_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz,
+nva3_clk_info(struct nouveau_clock *clock, int clk, u32 khz,
struct nva3_clock_info *info)
{
- struct nouveau_bios *bios = nouveau_bios(clock);
struct nva3_clock_priv *priv = (void *)clock;
- struct nvbios_pll limits;
- u32 oclk, sclk, sdiv;
- int P, N, M, diff;
- int ret;
+ u32 oclk, sclk, sdiv, diff;
- info->pll = 0;
info->clk = 0;
switch (khz) {
@@ -188,40 +183,64 @@ nva3_clock_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz,
return khz;
default:
sclk = read_vco(priv, clk);
- sdiv = min((scl...
2016 Jun 04
0
[PATCH 2/3] nvkm/clk/gf100: Read secondary bypass postdiv when required
...b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c
@@ -99,7 +99,7 @@ read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl)
{
struct nvkm_device *device = clk->base.subdev.device;
u32 ssrc = nvkm_rd32(device, dsrc + (doff * 4));
- u32 sctl = nvkm_rd32(device, dctl + (doff * 4));
+ u32 sclk, sctl, sdiv = 2;
switch (ssrc & 0x00000003) {
case 0:
@@ -109,13 +109,21 @@ read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl)
case 2:
return 100000;
case 3:
- if (sctl & 0x80000000) {
- u32 sclk = read_vco(clk, dsrc + (doff * 4));
- u32 sdiv = (sctl & 0x000...
2016 Jun 17
0
[PATCH v2 2/2] nvkm/clk/gf100: Read secondary bypass postdiv when required
...b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c
@@ -99,7 +99,7 @@ read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl)
{
struct nvkm_device *device = clk->base.subdev.device;
u32 ssrc = nvkm_rd32(device, dsrc + (doff * 4));
- u32 sctl = nvkm_rd32(device, dctl + (doff * 4));
+ u32 sclk, sctl, sdiv = 2;
switch (ssrc & 0x00000003) {
case 0:
@@ -109,13 +109,21 @@ read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl)
case 2:
return 100000;
case 3:
- if (sctl & 0x80000000) {
- u32 sclk = read_vco(clk, dsrc + (doff * 4));
- u32 sdiv = (sctl & 0x000...
2017 Sep 06
0
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...e
> error case indented and leave the normal case as the final 'return'
> statement.
>
I think to make perfectly clear why this check is done, we simply
should precompute the denominator and do something like this:
int denominator = M * P
if (denominator == 0)
return 0;
return sclk * N / denominator;
but with a better name for "denominator". I even imagine, that there
are some macros in the kernel for dealing with something like this
already, so that we could do instead:
return AWESOME_DIV_MACRO(sclk * N, M * P)
> Fixes: 7632b30e4b8b ("drm/nouveau/clk: na...
2016 Jun 17
1
[PATCH v2 1/2] nvkm/clk/gf100+: Clean up PLL locking test
Corresponds with GT215. Don't rely on the lock test logic being unconditionally
enabled, and disable test logic when done (presumably to save power).
v2: Remove warning, nvkm_msec already warns on time-out
Signed-off-by: Roy Spliet <nouveau at spliet.org>
---
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c | 8 +++++++-
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c | 8 +++++++-
2
2017 Sep 06
0
[PATCH] [v2] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...6881d9b9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
@@ -110,6 +110,7 @@ read_pll(struct gt215_clk *clk, int idx, u32 pll)
struct nvkm_device *device = clk->base.subdev.device;
u32 ctrl = nvkm_rd32(device, pll + 0);
u32 sclk = 0, P = 1, N = 1, M = 1;
+ u32 MP;
if (!(ctrl & 0x00000008)) {
if (ctrl & 0x00000001) {
@@ -130,10 +131,12 @@ read_pll(struct gt215_clk *clk, int idx, u32 pll)
sclk = read_clk(clk, 0x10 + idx, false);
}
- if (M * P)
- return sclk * N / (M * P);
+ MP = M * P;
- return 0;
+...
2018 Jan 16
0
[PATCH] [RESEND v2] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...6881d9b9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
@@ -110,6 +110,7 @@ read_pll(struct gt215_clk *clk, int idx, u32 pll)
struct nvkm_device *device = clk->base.subdev.device;
u32 ctrl = nvkm_rd32(device, pll + 0);
u32 sclk = 0, P = 1, N = 1, M = 1;
+ u32 MP;
if (!(ctrl & 0x00000008)) {
if (ctrl & 0x00000001) {
@@ -130,10 +131,12 @@ read_pll(struct gt215_clk *clk, int idx, u32 pll)
sclk = read_clk(clk, 0x10 + idx, false);
}
- if (M * P)
- return sclk * N / (M * P);
+ MP = M * P;
- return 0;
+...
2014 Aug 21
9
NVA3 clock tree improvements
Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved.
These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this problem is unrelated
2016 Jun 04
3
PM + Init work
Following a series of three patches, two of which have been sitting in my tree
for a while, the third is the result of some inspection of an NV134 BIOS that
seems to use the 0xaf upcode to upload training patterns. Please test!
Roy
Ps. Sorry they come from yet another e-mail address. My previous provider,
eclipso, actively blocks users of git send-email. Inquiries fall on deaf
ears, hence I
2019 Nov 20
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...{
> MBDL = GMXB (PIOF)
> PDUB (PIOF, MBDL)
> }
> }
> }
> Else
> {
> LKDS (PIOF)
> }
>
> If ((DerefOf (SCLK [Zero]) != Zero))
> {
> PCRO (0xDC, 0x100C, DerefOf (SCLK [One]))
> Sleep (0x10)
> }
>
> GPPR (PIOF, Zero)
> If ((OSYS != 0x07D9))
> {
> DIWK (PIOF)
>...
2017 Sep 06
2
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...l case as the final 'return'
>> statement.
>>
>
> I think to make perfectly clear why this check is done, we simply
> should precompute the denominator and do something like this:
>
> int denominator = M * P
> if (denominator == 0)
> return 0;
> return sclk * N / denominator;
>
> but with a better name for "denominator".
I don't know what M and P actually are in this function, so I couldn't
come up with a much better name either, how about simply 'divisor'?
> I even imagine, that there
> are some macros in the k...
2017 Jul 14
0
[PATCH 12/14] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...au/nvkm/subdev/clk/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
index 96e0941c8edd..04b4f4ccf186 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c
@@ -130,10 +130,10 @@ read_pll(struct gt215_clk *clk, int idx, u32 pll)
sclk = read_clk(clk, 0x10 + idx, false);
}
- if (M * P)
- return sclk * N / (M * P);
+ if (M * P == 0)
+ return 0;
- return 0;
+ return sclk * N / (M * P);
}
static int
--
2.9.0
2019 Nov 20
4
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...ElseIf ((PIOF == 0x02))
{
If ((P2GP == Zero))
{
Return (Zero)
}
}
PEBA = \XBAS /* External reference */
PDEV = GDEV (PIOF)
PFUN = GFUN (PIOF)
Name (SCLK, Package (0x03)
{
One,
0x80,
Zero
})
If ((CCHK (PIOF, Zero) == Zero))
{
Return (Zero)
}
\_SB.PCI0.PEG0.PEGP.LTRE = \_SB.PCI0.PEG0.LREN
If ((Arg0 ==...
2019 Nov 22
1
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...ElseIf ((PIOF == 0x02))
{
If ((P2GP == Zero))
{
Return (Zero)
}
}
PEBA = \XBAS /* External reference */
PDEV = GDEV (PIOF)
PFUN = GFUN (PIOF)
Name (SCLK, Package (0x03)
{
One,
0x80,
Zero
})
If ((CCHK (PIOF, Zero) == Zero))
{
Return (Zero)
}
\_SB.PCI0.PEG0.PEGP.LTRE = \_SB.PCI0.PEG0.LREN
If ((Arg0 ==...
2017 Sep 06
0
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
...;>> statement.
>>>
>>
>> I think to make perfectly clear why this check is done, we simply
>> should precompute the denominator and do something like this:
>>
>> int denominator = M * P
>> if (denominator == 0)
>> return 0;
>> return sclk * N / denominator;
>>
>> but with a better name for "denominator".
>
> I don't know what M and P actually are in this function, so I couldn't
> come up with a much better name either, how about simply 'divisor'?
>
what about "MP"? M and P...
2019 Nov 20
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...IOF)
> > PDUB (PIOF, MBDL)
> > }
> > }
> > }
> > Else
> > {
> > LKDS (PIOF)
> > }
> >
> > If ((DerefOf (SCLK [Zero]) != Zero))
> > {
> > PCRO (0xDC, 0x100C, DerefOf (SCLK [One]))
> > Sleep (0x10)
> > }
> >
> > GPPR (PIOF, Zero)
> > If ((OSYS != 0x07D9))
> > {
> >...
2016 Aug 26
0
[PATCH v8 11/18] ARM: DT: STiH407: Add i2s_in pinctrl configuration
...100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -1090,6 +1090,30 @@
};
};
+ i2s_in {
+ pinctrl_i2s_8ch_in: i2s_8ch_in{
+ st,pins {
+ mclk = <&pio32 5 ALT1 IN>;
+ lrclk = <&pio32 7 ALT1 IN>;
+ sclk = <&pio32 6 ALT1 IN>;
+ data0 = <&pio32 4 ALT1 IN>;
+ data1 = <&pio33 0 ALT1 IN>;
+ data2 = <&pio33 1 ALT1 IN>;
+ data3 = <&pio33 2 ALT1 IN>;
+ data4 = <&pio33 3 ALT1 IN>;
+ };
+ };
+
+ pinctrl_i2s_2ch_in...
2016 Aug 26
0
[PATCH v8 10/18] ARM: DT: STiH407: Add i2s_out pinctrl configuration
...44
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -1067,6 +1067,29 @@
};
};
+ i2s_out {
+ pinctrl_i2s_8ch_out: i2s_8ch_out{
+ st,pins {
+ mclk = <&pio33 5 ALT1 OUT>;
+ lrclk = <&pio33 7 ALT1 OUT>;
+ sclk = <&pio33 6 ALT1 OUT>;
+ data0 = <&pio33 4 ALT1 OUT>;
+ data1 = <&pio34 0 ALT1 OUT>;
+ data2 = <&pio34 1 ALT1 OUT>;
+ data3 = <&pio34 2 ALT1 OUT>;
+ };
+ };
+
+ pinctrl_i2s_2ch_out: i2s_2ch_out{
+ st,pins {
+ m...
2019 Nov 22
0
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...> If ((P2GP == Zero))
> {
> Return (Zero)
> }
> }
>
> PEBA = \XBAS /* External reference */
> PDEV = GDEV (PIOF)
> PFUN = GFUN (PIOF)
> Name (SCLK, Package (0x03)
> {
> One,
> 0x80,
> Zero
> })
> If ((CCHK (PIOF, Zero) == Zero))
> {
> Return (Zero)
> }
>
> \_SB.PCI0.PEG0.PEGP....